IP Library › Granted Patent US 11,777,460
Granted Patent B2
US 11,777,460 · App. 17/622,761 · Granted Oct 3, 2023

Operational amplifier

Inventor: Yiqiang Wu (Shenzhen, CN)
Assignee: SANECHIPS TECHNOLOGY CO., LTD.
H03F3/45188H03F3/45273H03F2203/45156H03F2203/45222
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Quick Facts
Patent No.
US 11,777,460
App. No.
17/622,761
Granted
Oct 3, 2023
Kind
B2
Abstract

Disclosed is an operational amplifier, including a first-stage gain circuit, a second-stage gain circuit, and a tail current compensation circuit. The first-stage gain circuit is connected to the second-stage gain circuit, the first-stage gain circuit is provided with an input terminal, the second-stage gain circuit is provided with an output terminal. The first-stage gain circuit at least includes a tail current source, a first terminal of the tail current compensation circuit is connected to the tail current source, and a second terminal of the tail current compensation circuit is connected to the output terminal of the second-stage gain circuit. The tail current compensation circuit is configured to compensate the tail current source with an output signal of the output terminal of the second-stage gain circuit.

Claims (26)

1. An operational amplifier, comprising a first-stage gain circuit, a second-stage gain circuit, a tail current compensation circuit and a positive feedback tuning circuit, wherein

the first-stage gain circuit is connected to the second-stage gain circuit and provided with an input terminal, the second-stage gain circuit is provided with an output terminal;

the first-stage gain circuit at least comprises a tail current source, a first terminal of the tail current compensation circuit is connected to the tail current source, and a second terminal of the tail current compensation circuit is connected to the output terminal of the second-stage gain circuit;

the tail current compensation circuit is configured to compensate the tail current source with an output signal of the output terminal of the second-stage gain circuit, and

a first terminal of the positive feedback tuning circuit is connected to the first-stage gain circuit, a second terminal of the positive feedback tuning circuit is connected to ground, and the positive feedback tuning circuit is configured to reject a positive feedback signal introduced by the tail current compensation circuit.

2. The operational amplifier of claim 1 , wherein

the tail current compensation circuit comprises a compensation capacitor.

3. The operational amplifier of claim 2 , wherein the tail current compensation circuit further comprises a compensation resistor which is connected in series with the compensation capacitor.

4. The operational amplifier of claim 1 , wherein the positive feedback tuning circuit comprises one of, or a series-parallel combination of at least two of:

a capacitor;

a resistor;

an inductor; and

an active device.

5. The operational amplifier of claim 1 , wherein

the first-stage gain circuit further comprises a first-stage amplifying circuit and a current mirror load circuit, the first-stage amplifying circuit is connected to the current mirror load circuit, and to the tail current source and the tail current compensation circuit.

6. The operational amplifier of claim 5 , wherein the first-stage amplifying circuit comprises at least one of:

a cascode amplifying circuit with differential input and single-ended output; and

a common-source amplifying circuit with differential input and single-ended output.

7. The operational amplifier of claim 6 , wherein the second-stage gain circuit comprises at least one of:

a common-source amplifying circuit with single-ended input and single-ended output; and

a cascode amplifying circuit with single-ended input and single-ended output.

8. The operational amplifier of claim 5 , wherein

the first-stage amplifying circuit comprises an amplifying circuit with differential input and differential output; and

the second-stage gain circuit comprises an amplifying circuit with single-ended and single-ended output.

9. The operational amplifier of claim 5 , wherein

the current mirror load circuit comprises a cascode current mirror circuit.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2022
From: ZTE CORPORATION
To: SANECHIPS TECHNOLOGY CO., LTD.
Reel/Frame 061789/0596 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 24, 2021
From: WU, YIQIANG
To: ZTE CORPORATION
Reel/Frame 058476/0468 →
Priority Claims (1)
CN 201910846512.2 · Sep 9, 2019 · national
Continuity (1)
Related Publication 20220278661A1 · Sep 1, 2022