Display substrate, manufacturing method thereof and display device
The present disclosure provides a display substrate, a manufacturing method thereof and a display device, and relates to the field of display technology. The display substrate includes a base substrate, and a driving circuitry layer and a light-emitting unit arranged on the base substrate. The driving circuitry layer includes a first gate metal layer, and a pattern of the first gate metal layer includes a gate line. The first gate metal layer includes a first conductive layer with resistivity less than a first threshold and a Young's modulus less than a second threshold, and a first conductive protection layer arranged at a side of the first conductive layer away from the base substrate.
1 . A display substrate, comprising a base substrate, and a driving circuitry layer and a light-emitting unit arranged on the base substrate, wherein the driving circuitry layer comprises a first gate metal layer, and a pattern of the first gate metal layer comprises a gate line, the first gate metal layer comprises a first conductive layer with resistivity less than a first threshold and a Young's modulus less than a second threshold, and a first conductive protection layer arranged at a side of the first conductive layer away from the base substrate;
wherein the first threshold is 5 micro-ohm·centimeter (μΩ·cm), and the second threshold is 130 Gpa;
wherein the first conductive layer is Aluminium (Al);
wherein the first gate metal layer further comprises a second conductive protection layer arranged at a side of the first conductive layer close to the base substrate, the first conductive protection layer is made of Titanium Nitride (TiN), and the second conductive protection layer is made of TIN;
wherein a thickness of the first conductive layer is 300 nm-500 nm, a thickness of the first conductive protection layer is 30 nm-50 nm, and a thickness of the second conductive protection layer is 30 nm-50 nm.
2 . The display substrate according to claim 1 , wherein the first conductive layer is an Al alloy, and the Al alloy comprises at least one of Cerium (Ce), Zirconium (Zr), scandium (Sc), Manganese (Mn), Nickel (Ni), and Lanthanum (La).
3 . A display device, comprising the display substrate according to claim 1 .
4 . The display substrate according to claim 1 , wherein the driving circuitry layer further comprises a second gate metal layer arranged at a side of the first gate metal layer away from the base substrate, a pattern of the second gate metal layer comprises an electrode plate of a storage capacitor, and a composition of the second gate metal layer is the same as a composition of the first gate metal layer.
5 . A method for manufacturing a display substrate, comprising forming a driving circuitry layer and a light-emitting unit on a base substrate, wherein the driving circuitry layer comprises a first gate metal layer, and a pattern of the first gate metal layer comprises a gate line, wherein forming the first gate metal layer comprises forming a first conductive layer with resistivity less than a first threshold and a Young's modulus less than a second threshold, and forming a first conductive protection layer arranged at a side of the first conductive layer away from the base substrate;
wherein the first threshold is 5 micro-ohm·centimeter (μΩ·cm), and the second threshold is 130 Gpa;
wherein the first gate metal layer further comprises a second conductive protection layer arranged at a side of the first conductive layer close to a flexible substrate, wherein the method further comprises: depositing TIN on the flexible substrate to form the second conductive protection layer; depositing Al or an Al alloy on the second conductive protection layer to form the first conductive layer; and depositing TiN on the first conductive layer to form the first conductive protection layer;
wherein a thickness of the first conductive layer is 300 nm-500 nm, a thickness of the first conductive protection layer is 30 nm-50 nm, and a thickness of the second conductive protection layer is 30 nm-50 nm.
6 . The method according to claim 5 , wherein prior to forming the first gate metal layer, the method further comprises: providing a rigid substrate and forming a flexible substrate on the rigid substrate; forming a buffer layer on the flexible substrate; forming an active layer on the buffer layer; and forming a first gate insulation layer.
7 . The method according to claim 5 , further comprising depositing an interlayer insulation layer through Plasma Enhanced Chemical Vapor Deposition (PECVD), wherein the interlayer insulation layer is made of silicon nitride or silicon oxide, or has a double-layer structure comprising a silicon nitride thin film and a silicon oxide thin film.
8 . The method according to claim 7 , further comprising depositing a source/drain metal layer, and patterning the source/drain metal layer to form a pattern of the source/drain metal layer.
9 . The method according to claim 8 , wherein the forming the light-emitting unit comprises: depositing a transparent conductive layer, and patterning the transparent conductive layer to form an anode pattern; forming a pixel definition layer through exposing and developing an organic resin; forming a light-emitting layer and a cathode through evaporation; and forming a packaging layer.