IP Library Granted Patent US 12,048,084
Granted Patent B2
US 12,048,084 · App. 17/637,133 · Granted Jul 23, 2024

Covering film, and circuit board and manufacturing method

Inventors: Hsiao-Ting Hsu (New Taipei, TW); Ming-Jaan Ho (New Taipei, TW); Katsumi Fujiwara (Shenzhen, CN); Fu-Yun Shen (Shenzhen, CN); Fu-Wei Zhong (Shenzhen, CN)
Assignees: Avary Holding (Shenzhen) Co., Limited.; QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD
H05K1/0209H05K1/0353H05K1/028
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Quick Facts
Patent No.
US 12,048,084
App. No.
17/637,133
Granted
Jul 23, 2024
Kind
B2
Abstract

A covering film ( 100 ) includes a first covering layer ( 10 ), a first adhesive layer ( 20 ), and a thermal conductive layer ( 30 ) sandwiched between the first covering layer ( 10 ) and the first adhesive layer ( 20 ). A thermal conductivity of the thermal conductive layer ( 30 ) is K1, K1 is in a range of 3 W/m.K to 65 W/m.K. A thermal conductivity of the first covering layer ( 10 ) is K2, K2 is in a range of 0.02 W/m.K to 3.0 W/m.K. A thermal conductivity of the first adhesive layer ( 20 ) is K3, K3 is in a range of 0.02 W/m.K to 1.0 W/m.K. A circuit board and its manufacturing method are also provided.

Claims (25)

1. A covering film, comprising:

a first covering layer;

a first adhesive layer; and

a thermal conductive layer sandwiched between the first covering layer and the first adhesive layer, wherein the thermal conductive layer comprises a base material and first thermal conductive powders dispersed in the base material,

wherein a thermal conductivity of the thermal conductive layer is K1, K1 is in a range of 3 W/m.K to 65 W/m.K; a thermal conductivity of the first covering layer is K2, K2 is in a range of 0.02 W/m.K to 3.0 W/m.K; and a thermal conductivity of the first adhesive layer is K3, K3 is in a range of 0.02 W/m.K to 1.0 W/m.K.

2. The covering film of claim 1 , wherein the base material comprises at least one of polyimide, epoxy resin, phenolic resin, polyether ether ketone, and polyurethane; the first thermal conductive powders comprise at least one of graphene, carbon fibers, carbon powders, carbon nanotubes, and silver powders; an outer surface of the graphene or the carbon nanotubes is bonded with polar groups.

3. The covering film of claim 1 , wherein the first covering layer comprises polyimide and second thermal conductive powders, the second thermal conductive powders comprise at least one of alumina powders, aluminum nitride powders, silicon carbide powders, and boron nitride powders.

4. The covering film of claim 1 , wherein a thickness of the first covering layer is in a range of 7.5 μm to 25 μm, a thickness of the first adhesive layer is in a range of 5 μm to 50 μm, and a thickness of the thermal conductive layer is in a range of 3 μm to 15 μm.

5. A manufacturing method of a circuit board, comprising

providing an inner substrate, comprising a substrate, two first wiring layers disposed on two opposite surfaces of the substrate, and a second wiring layer inside the substrate; and

forming a first covering film on one of the two first wiring layers, the first covering film comprising a first covering layer, a first adhesive layer, and a thermal conductive layer sandwiched between the first covering layer and the first adhesive layer, wherein the thermal conductive layer comprises a base material and first thermal conductive powders dispersed in the base material, a thermal conductivity of the thermal conductive layer is K1, K1 is in a range of 3 W/m.K to 65 W/m.K; a thermal conductivity of the first covering layer is K2, K2 is in a range of 0.02 W/m.K to 3.0 W/m.K; a thermal conductivity of the first adhesive layer is K3, K3 is in a range of 0.02 W/m.K to 1.0 W/m.K; the first adhesive layer is directly in contact with the one of the two first wiring layers.

6. The manufacturing method of the circuit board of claim 5 , further comprising:

forming a second covering film on the other one of the two first wiring layers, the second covering film comprising a second adhesive layer disposed on the other one of the two first wiring layers and a second covering layer disposed on the second adhesive layer.

7. The manufacturing method of the circuit board of claim 5 , further comprising:

forming a steel plate on the first covering layer, wherein the steel plate and the first covering layer are bonded together by a conductive adhesive layer.

8. The manufacturing method of the circuit board of claim 7 , further comprising:

defining a hole in the first covering film, wherein the hole connects the steel plate to the one of the two first wiring layers, a portion of the conductive adhesive layer is filled in the hole to allow the one of the two first wiring layers to electrically connect to the steel plate.

9. A circuit board, comprising:

an inner substrate; and

a covering film disposed on a surface of the inner substrate,

wherein the inner substrate comprises a substrate, two first wiring layers disposed on two opposite surfaces of the substrate, and a second wiring layer inside the substrate, and

wherein the covering film comprises a first covering layer, a first adhesive layer, and a thermal conductive layer sandwiched between the first covering layer and the first adhesive layer; the thermal conductive layer comprises a base material and first thermal conductive powders dispersed in the base material, a thermal conductivity of the thermal conductive layer is K1, K1 is in a range of 3 W/m.K to 65 W/m.K; a thermal conductivity of the first covering layer is K2, K2 is in a range of 0.02 W/m.K to 3.0 W/m.K; a thermal conductivity of the first adhesive layer is K3, K3 is in a range of 0.02 W/m.K to 1.0 W/m.K, and the first adhesive layer is in direct contact with one of the two first wiring layers.

10. The circuit board of claim 9 , wherein the base material comprises at least one of polyimide, epoxy resin, phenolic resin, polyether ether ketone, and polyurethane; the first thermal conductive powders comprise at least one of graphene, carbon fibers, carbon powders, carbon nanotubes, and silver powders; an outer surface of the graphene or the carbon nanotubes is bonded with polar groups.

11. The circuit board of claim 9 , wherein the first covering layer comprises polyimide and second thermal conductive powders, the second thermal conductive powders comprise at least one of alumina powders, aluminum nitride powders, silicon carbide powders, and boron nitride powders.

12. The circuit board of claim 9 , wherein a thickness of the first covering layer is in a range of 7.5 μm to 25 μm, a thickness of the first adhesive layer is in a range of 5 μm to 50 μm, and a thickness of the thermal conductive layer is in a range of 3 μm to 15 μm.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2022
From: HSU, HSIAO-TING; HO, MING-JAAN; FUJIWARA, KATSUMI; SHEN, FU-YUN; ZHONG, FU-WEI
To: AVARY HOLDING (SHENZHEN) CO., LIMITED.; QING DING PRECISION ELECTRONICS (HUAIAN) CO.,LTD
Reel/Frame 059080/0843 →
Continuity (1)
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