IP Library › Granted Patent US 12,429,976
Granted Patent B2
US 12,429,976 · App. 17/637,137 · Granted Sep 30, 2025

Touch display panel and display device

Inventor: Liang Ma (Hubei, CN)
Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
G06F3/04166
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Quick Facts
Patent No.
US 12,429,976
App. No.
17/637,137
Granted
Sep 30, 2025
Kind
B2
Abstract

A touch display panel is disclosed. The touch display panel includes a substrate, a touch layer, and a first demultiplexing circuit. The first demultiplexing circuit includes demultiplexing units. The demultiplexing units include first transistors and second transistors. By disposing a gate electrode of the first transistors connected to a gate electrode of the second transistors in one of the demultiplexing units, time-sharing drive is realized in the first transistor and the second transistor through a signal, which can reduce a number of signals required by the demultiplexing circuits.

Claims (28)

1. A touch display panel, comprising:

a substrate comprising a display region and a non-display region;

a touch layer disposed on a side of the substrate, wherein the touch layer comprises a plurality of touch electrodes disposed in the display region;

a first demultiplexing circuit disposed on the side of the substrate and disposed corresponding to the non-display region, wherein the first demultiplexing circuit comprises demultiplexing units electrically connected to corresponding touch electrodes, the demultiplexing units comprise first transistors and second transistors,

one of the touch electrodes is electrically connected to one of source electrodes or drain electrodes of the first transistors and one of source electrodes or drain electrodes of the second transistors, and gate electrodes of the first transistors are electrically connected to gate electrodes of the second transistors,

wherein when one of the first transistors or the second transistors is turned on, another one of the first transistors or the second transistors is turned off; in the first demultiplexing circuit, another one of the source electrodes or the drain electrodes of each of the second transistors are electrically connected to each other, and another one of the source electrodes or the drain electrodes of each of the first transistors are configured to receive different touch driving signals; and

a second demultiplexing circuit comprising at least one third transistor, one of a source electrode or a drain electrode of the at least one third transistor is electrically connected to the another one of the source electrodes or the drain electrodes of each of the second transistors, a gate electrode of the at least one third transistor is configured to receive a corresponding driving signal, the plurality of touch electrodes are sensed through another one of the source electrode or the drain electrode of the at least one third transistor, each third transistor in the second demultiplexing circuit corresponds to one first demultiplexing circuit.

2. The touch display panel as claimed in claim 1 , wherein each of the demultiplexing units comprises control lines; and in each of the demultiplexing units, one of the control lines is electrically connected to a gate electrode of the first transistors and a gate electrode of the second transistors.

3. The touch display panel as claimed in claim 2 , wherein the control lines are configured to transmit enable signals, and the enable signals turn on one of the first transistors or the second transistors and turn off one of the first transistors or the second transistors at a same time.

4. The touch display panel as claimed in claim 2 , wherein the touch display panel comprises first pads disposed on the side of the substrate and located in the non-display region;

one of the first pads is electrically connected to one of the control lines correspondingly; and

a number of the first pads is equal to a number of the demultiplexing units, or the number of the first pads is less than a number of a sum of the first transistors and the second transistors.

5. The touch display panel as claimed in claim 1 , wherein the touch display panel comprises a second pad; the second pad is electrically connected to the another one of the source electrode or the drain electrode of the at least one third transistor; and a number of the second pad is equal to a number of the first demultiplexing circuit, or the number of the second pad is less than a number of the demultiplexing units in the first demultiplexing circuit.

6. The touch display panel as claimed in claim 1 , wherein the touch display panel comprises touch traces, a terminal of one of the touch traces is connected to one of the touch electrodes, another terminal of the one of the touch traces is electrically connected to the one of the source electrodes or the drain electrodes of the first transistors and the one of the source electrodes or the drain electrodes of the second transistors, and the touch traces and the touch electrodes are located in a same film layer.

7. The touch display panel as claimed in claim 1 , wherein a first transistor is one of a N-channel type transistor or a P-channel type transistor, and a second transistor is another one of the N-channel type transistor or the P-channel type transistor.

8. A display device, comprising a touch display panel, wherein the touch display panel comprises:

a substrate comprising a display region and a non-display region;

a touch layer disposed on a side of the substrate, wherein the touch layer comprises a plurality of touch electrodes disposed in the display region;

a first demultiplexing circuit disposed on the side of the substrate and disposed corresponding to the non-display region, wherein the first demultiplexing circuit comprises demultiplexing units electrically connected to corresponding touch electrodes, the demultiplexing units comprise first transistors and second transistors,

one of the touch electrodes is electrically connected to one of source electrodes or drain electrodes of the first transistors and one of source electrodes or drain electrodes of the second transistors, and gate electrodes of the first transistors are electrically connected to gate electrodes of the second transistors,

wherein when one of the first transistors or the second transistors is turned on, another one of the first transistors or the second transistors is turned off; in the first demultiplexing circuit, another one of the source electrodes or the drain electrodes of each of the second transistors are electrically connected to each other, and another one of the source electrodes or the drain electrodes of each of the first transistors are configured to receive different touch driving signals; and

a second demultiplexing circuit comprising at least one third transistor, one of a source electrode or a drain electrode of the at least one third transistor is electrically connected to the another one of the source electrodes or the drain electrodes of each of the second transistors, a gate electrode of the at least one third transistor is configured to receive a corresponding driving signal, the plurality of touch electrodes are sensed through another one of the source electrode or the drain electrode of the at least one third transistor, each third transistor in the second demultiplexing circuit corresponds to one first demultiplexing circuit.

9. The display device as claimed in claim 8 , wherein each of the demultiplexing units comprises control lines; and in each of the demultiplexing units, one of the control lines is electrically connected to a gate electrode of the first transistors and a gate electrode of the second transistors.

10. The display device as claimed in claim 9 , wherein the control lines are configured to transmit enable signals, and the enable signals turn on one of the first transistors or the second transistors and turn off one of the first transistors or the second transistors at a same time.

11. The display device as claimed in claim 9 , wherein the touch display panel comprises first pads disposed on the side of the substrate and located in the non-display region; one of the first pads is electrically connected to one of the control lines correspondingly; and a number of the first pads is equal to a number of the demultiplexing units, or the number of the first pads is less than a number of a sum of the first transistors and the second transistors.

12. The display device as claimed in claim 8 , wherein the touch display panel comprises a second pad; the second pad is electrically connected to the another one of the source electrode or the drain electrode of the at least one third transistor; and a number of the second pad is equal to a number of the first demultiplexing circuit, or the number of the second pad is less than a number of the demultiplexing units in the first demultiplexing circuit.

13. The display device as claimed in claim 8 , wherein the touch display panel comprises touch traces, a terminal of one of the touch traces is connected to one of the touch electrodes, another terminal of the one of the touch traces is electrically connected to the one of the source electrodes or the drain electrodes of the first transistors and the one of the source electrodes or the drain electrodes of the second transistors, and the touch traces and the touch electrodes are located in a same film layer.

14. The display device as claimed in claim 8 , wherein a first transistor is one of a N-channel type transistor or a P-channel type transistor, and a second transistor is another one of the N-channel type transistor or the P-channel type transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2022
From: MA, LIANG
To: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
Reel/Frame 059113/0375 →
Priority Claims (1)
CN 202210089012.0 · Jan 25, 2022 · national
Continuity (1)
Related Publication 20240045542A1 · Feb 8, 2024
References Cited (20)
US 10365743B2 · Pan · 2019 [cited by examiner]
US 11269451B2 · Fang · 2022 [cited by examiner]
US 12045413B2 · Zhou · 2024 [cited by examiner]
US 12045415B2 · Ma · 2024 [cited by examiner]
US 20160328072A1 · Yang · 2016 [cited by examiner]
US 20170168605A1 · Xi · 2017 [cited by examiner]
US 20180336809A1 · Xi et al. · 2018 [cited by applicant]
US 20190102026A1 · Abe · 2019 [cited by examiner]
US 20210191549A1 · Kim et al. · 2021 [cited by applicant]
US 20220019317A1 · Kim · 2022 [cited by examiner]
US 20240419285A1 · Ma · 2024 [cited by examiner]
CN 104777955 · 2015 [cited by applicant]
CN 105074806 · 2015 [cited by applicant]
CN 106155449 · 2016 [cited by applicant]
CN 106708325 · 2017 [cited by applicant]
CN 106775126 · 2017 [cited by applicant]
CN 113485587 · 2021 [cited by applicant]
DE 102016120632 · 2017 [cited by applicant]
International Search Report and the Written Opinion Dated Oct. 20, 2022 From the International Searching Authority Re. Application No. PCT/CN2022/075355 and Its Translation Into English. (16 Pages). [cited by applicant]
Notification of Office Action and Search Report Dated Apr. 29, 2023 From The State Intellectual Property Office of the People's Republic of China Re. Application No. 202210089012.0 and Its Translation Into English. (23 … [cited by applicant]