IP Library Granted Patent US 12,040,017
Granted Patent B2
US 12,040,017 · App. 17/646,427 · Granted Jul 16, 2024

Current and voltage limit circuitry for resistive random access memory programming

Inventor: Lior Dagan (Ram-On, IL)
Assignee: Weebit Nano Ltd.
G11C13/0069H10B63/00G11C2013/0071
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Quick Facts
Patent No.
US 12,040,017
App. No.
17/646,427
Granted
Jul 16, 2024
Kind
B2
Abstract

A programming circuitry for a resistor of a resistive random-access memory (ReRAM) is provided. The programming circuitry includes a current-limiting circuit; a current-terminating circuit including a current measurement circuit and a control circuit; and a voltage-limiting circuit, wherein the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit operate in concert.

Claims (20)

1. A programming circuitry for a resistor of a resistive random-access memory (ReRAM), comprising:

a current-limiting circuit;

a current-terminating circuit including a current measurement circuit and a control circuit; and

a voltage-limiting circuit,

wherein the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit operate in concert; and

wherein at least a maximum current through the ReRAM resistor is limited by the current-limiting circuit.

2. The programming circuitry of claim 1 , wherein each of the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit is the ReRAM resistor programming circuitry.

3. The programming circuitry of claim 1 , wherein at least a maximum electrical field over the ReRAM resistor is controlled by the programming circuitry.

4. The programming circuitry of claim 1 , wherein any of: the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit includes an operational amplifier.

5. The programming circuitry of claim 1 , wherein any of: the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit includes a current conveyor.

6. The programming circuitry of claim 1 , wherein programming involves at least one of: forming, set-programming, and reset-programming.

7. The programming circuitry of claim 1 , wherein the programming circuitry is connected to at least one ReRAM cell of a plurality of ReRAM cells of a ReRAM array of cells.

8. A non-volatile memory, comprising:

an array of resistive random-access memory (ReRAM) including a plurality of ReRAM cells, wherein each ReRAM cell includes at least a ReRAM resistor; and

at least a programming circuitry coupled to the at least a ReRAM resistor, wherein the programing circuitry includes a current-limiting circuit, a current-terminating circuit, and a voltage-limiting circuit, wherein the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit operate in concert;

wherein at least a maximum current through the ReRAM resistor is limited by the current-limiting circuit.

9. The non-volatile memory of claim 8 , wherein at least a maximum electrical field over the at least a ReRAM resistor is controlled by the at least a programming circuitry.

10. The non-volatile memory of claim 8 , wherein any one of: the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit includes an operational amplifier.

11. The non-volatile memory of claim 8 , wherein any one of: the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit includes a current conveyor.

12. The non-volatile memory of claim 8 , wherein programming involves at least one of: forming, set-programming, and reset-programming.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2021
From: DAGAN, LIOR
To: WEEBIT NANO LTD.
Reel/Frame 058502/0841 →
Continuity (2)
Provisional Application 63142770 · Jan 28, 2021
Related Publication 20220238156A1 · Jul 28, 2022
Cited By (1)
US 12,347,487