Granted Patent B2

US 12,347,487 · App. 18/740,981 · Granted Jul 1, 2025

Inventor: Lior Dagan (Ram-On, IL)

Assignee: Weebit Nano Ltd.

G11C13/0069H10B63/00G11C2013/0071

Abstract

Claims (40)

1. A programming circuitry for a resistor of a resistive random-access memory (ReRAM), comprising:

a current-limiting circuit;

a current-terminating circuit including a current measurement circuit and a control circuit; and

a voltage-limiting circuit,

wherein the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit operate in concert; and

wherein any one of: the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit comprise an operational amplifier.

2. The programming circuitry of claim 1 , wherein each of the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit is the ReRAM resistor programming circuitry.

3. The programming circuitry of claim 1 , wherein at least a maximum electrical field over the ReRAM resistor is controlled by the programming circuitry.

4. The programming circuitry of claim 1 , wherein any of: the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit comprises a current conveyor.

5. The programming circuitry of claim 1 , wherein at least a maximum current through the ReRAM resistor is limited by the current-limiting circuit.

6. The programming circuitry of claim 1 , wherein programming involves at least one of: forming, set-programming, and reset-programming.

7. The programming circuitry of claim 1 , wherein the programming circuitry is connected to at least one ReRAM cell of a plurality of ReRAM cells of a ReRAM array of cells.

8. A programming circuitry for a resistor of a resistive random-access memory (ReRAM), comprising:

a current-limiting circuit;

a current-terminating circuit including a current measurement circuit and a control circuit; and

a voltage-limiting circuit,

wherein the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit operate in concert; and

wherein any one of: the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit comprises a current conveyor.

9. The programming circuitry of claim 8 , wherein each of the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit is the ReRAM resistor programming circuitry.

10. The programming circuitry of claim 8 , wherein at least a maximum electrical field over the ReRAM resistor is controlled by the programming circuitry.

11. The programming circuitry of claim 8 , wherein any of: the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit comprises an operational amplifier.

12. The programming circuitry of claim 8 , wherein at least a maximum current through the ReRAM resistor is limited by the current-limiting circuit.

13. The programming circuitry of claim 8 , wherein programming involves at least one of: forming, set-programming, and reset-programming.

14. The programming circuitry of claim 8 , wherein the programming circuitry is connected to at least one ReRAM cell of a plurality of ReRAM cells of a ReRAM array of cells.

15. A non-volatile memory, comprising:

an array of resistive random-access memory (ReRAM) including a plurality of ReRAM cells, wherein each ReRAM cell includes at least a ReRAM resistor; and

at least a programming circuitry coupled to the at least a ReRAM resistor, wherein the programming circuitry includes a current-limiting circuit, a current-terminating circuit, and a voltage-limiting circuit, wherein the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit operate in concert;

wherein any one of: the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit comprises an operational amplifier.

16. The non-volatile memory of claim 15 , wherein at least a maximum electrical field over the at least a ReRAM resistor is controlled by the at least a programming circuitry.

17. The non-volatile memory of claim 15 , wherein any one of: the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit comprises a current conveyor.

18. The non-volatile memory of claim 15 , wherein at least a maximum current through the ReRAM resistor is limited by the current-limiting circuit.

19. The non-volatile memory of claim 15 , wherein programming involves at least one of: forming, set-programming, and reset-programming.

20. A non-volatile memory, comprising:

an array of resistive random-access memory (ReRAM) including a plurality of ReRAM cells, wherein each ReRAM cell includes at least a ReRAM resistor; and

at least a programming circuitry coupled to the at least a ReRAM resistor, wherein the programming circuitry includes a current-limiting circuit, a current-terminating circuit, and a voltage-limiting circuit, wherein the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit operate in concert;

wherein any one of: the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit comprises a current conveyor.

21. The non-volatile memory of claim 20 , wherein at least a maximum electrical field over the at least a ReRAM resistor is controlled by the at least a programming circuitry.

22. The non-volatile memory of claim 20 , wherein any one of: the current-limiting circuit, the current-terminating circuit, and the voltage-limiting circuit comprises an operational amplifier.

23. The non-volatile memory of claim 20 , wherein at least a maximum current through the ReRAM resistor is limited by the current-limiting circuit.

24. The non-volatile memory of claim 20 , wherein programming involves at least one of: forming, set-programming, and reset-programming.

Continuity (3)

References Cited (32)