IP Library › Granted Patent US 12,245,238
Granted Patent B2
US 12,245,238 · App. 17/647,273 · Granted Mar 4, 2025

Uplink control information multiplexing

Inventors: Yi Huang (San Diego, CA); Wanshi Chen (San Diego, CA); Peter Gaal (San Diego, CA); Tingfang Ji (San Diego, CA); Wei Yang (San Diego, CA); Gokul Sridharan (Sunnyvale, CA); Ahmed Elshafie (San Diego, CA)
Assignee: QUALCOMM Incorporated
H04W72/21H04L27/2607H04W72/1263H04W72/566
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Quick Facts
Patent No.
US 12,245,238
App. No.
17/647,273
Granted
Mar 4, 2025
Kind
B2
Abstract

Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may generate an uplink control information (UCI) message including a scheduling request bit multiplexed with a first UCI bit and a second UCI bit, including: selecting a set of sequences, of a set of candidate sets of sequences, to use for multiplexing the first UCI bit and the second UCI bit, the selection of the set of sequences indicating the scheduling request bit, and multiplexing the first UCI bit and the second UCI bit based at least in part on the set of sequences. The UE may transmit the UCI message. Numerous other aspects are described.

Claims (82)

1. A user equipment (UE) for wireless communication, comprising:

one or more memories; and

one or more processors coupled to the one or more memories, the one or more processors configured to:

generate an uplink control information (UCI) message including a scheduling request bit multiplexed with a first UCI bit and a second UCI bit, including:

selection of a set of sequences, of a set of candidate sets of sequences, to use for multiplexing the first UCI bit and the second UCI bit, the selection of the set of sequences indicating the scheduling request bit, wherein the set of sequences includes a first sequence and a second sequence that is orthogonal to the first sequence, and

multiplexing of the first UCI bit and the second UCI bit based at least in part on the set of sequences by applying the first sequence to the first UCI bit and applying the second sequence to the second UCI bit;

wherein the first UCI bit having the first sequence applied is superimposed with the second UCI bit having the second sequence applied; and

transmit the UCI message.

2. The UE of claim 1 , wherein the one or more processors are further configured to:

receive an indication of the set of candidate sets of sequences from which the set of sequences is to be selected to indicate the scheduling request bit.

3. The UE of claim 2 , wherein the indication of the set of candidate sets of sequences includes an indication that selection of the set of sequences from the set of candidate sets of sequences indicates the scheduling request bit.

4. The UE of claim 2 , wherein the indication of the set of candidate sets of sequences includes an indication of a set of cyclic shifts to apply to a cell-specific base sequence to generate sequences of the set of candidate sets of sequences.

5. The UE of claim 1 , wherein the set of candidate sets of sequences includes the set of sequences and an additional set of sequences,

wherein the set of sequences is associated with a first candidate value of the scheduling request bit, and

wherein the additional set of sequences is associated with a second candidate value of the scheduling request bit.

6. The UE of claim 1 , wherein the UCI message is a physical uplink control channel format 1 message.

7. The UE of claim 1 , wherein the set of sequences includes a single sequence, and

wherein the one or more processors, when multiplexing the scheduling request bit with the first UCI bit and the second UCI bit, are configured to apply the single sequence to the first UCI bit and the second UCI bit.

8. The UE of claim 7 , wherein the one or more processors, when multiplexing the first UCI bit and the second UCI bit, are configured to:

modulate, based at least in part on quadrature phase shift keying (QPSK), a symbol of two bits including the first UCI bit and the second UCI bit.

9. The UE of claim 8 , wherein the one or more processors, when modulating, based at least in part on QPSK, the symbol of two bits, are configured to:

combine the second UCI bit, modulated based at least in part QPSK, with the single sequence on even OFDM symbols.

10. The UE of claim 1 , wherein the first sequence comprises a cell-specific base sequence having a first cyclic shift applied, and

wherein the second sequence comprises the cell-specific base sequence having a second cyclic shift applied.

11. The UE of claim 1 , wherein the one or more processors are further configured to:

receive, from a base station, an indication of the first cyclic shift and the second cyclic shift.

12. The UE of claim 1 , wherein the UCI message is configured to be received based at least in part on correlating the first sequence with the UCI message to extract the first UCI bit and correlating the second sequence with the UCI message to extract the second UCI bit.

13. The UE of claim 1 , wherein the one or more processors, when generating the UCI message, are configured to:

apply a first weight to the first UCI bit having the first sequence applied and apply a second weight to the second UCI bit having the second sequence applied; and

wherein the first UCI bit having the first sequence applied, and with the first weight applied, is superimposed with the second UCI bit having the second sequence applied, and with the second weight applied.

14. The UE of claim 13 , wherein the first weight is applied to the first UCI bit having the first sequence applied based at least in part on the first weight being greater than the second weight and based at least in part on the first UCI bit having a higher priority than a priority of the second UCI bit.

15. The UE of claim 13 , wherein the one or more processors are further configured to:

receive, from a base station, an indication to apply the first weight to the first UCI bit and to apply the second weight to the second UCI bit.

16. The UE of claim 1 , wherein a selection of the second sequence indicates the first UCI bit, and wherein the one or more processors, when multiplexing the scheduling request bit with the first UCI bit and the second UCI bit, are configured to:

apply the second sequence to the second UCI bit.

17. The UE of claim 16 , wherein the one or more processors are further configured to:

receive an indication that selection of the second sequence from the set of sequences indicates the first UCI bit.

18. The UE of claim 16 , wherein the set of sequences includes the sequence and an additional sequence,

wherein the second sequence is associated with a first candidate value of the first UCI bit, and

wherein the additional sequence is associated with a second candidate value of the first UCI bit.

19. The UE of claim 16 , wherein the one or more processors, when applying the sequence to the second UCI bit, are configured to:

modulate, based at least in part on binary phase shift keying (BPSK), a symbol of one bit including the second UCI bit.

20. The UE of claim 19 , wherein the one or more processors, when modulating, based at least in part on BPSK, the symbol of one bit, are configured to:

combine the second UCI bit, modulated based at least in part BPSK, with the second sequence on even OFDM symbols.

21. The UE of claim 1 , wherein the first UCI bit has a priority that is higher than a priority of the second UCI bit.

22. A UE for wireless communication, comprising:

one or more memories; and

one or more processors coupled to the one or more memories, the one or more processors configured to:

generate an uplink control information (UCI) message including a scheduling request bit multiplexed with a first UCI bit and a second UCI bit, including:

select a set of cyclic shift indices, of a set of candidate sets of cyclic shift indices, to use for multiplexing the first UCI bit and the second UCI bit, the selection of the set of cyclic shift indices indicating the scheduling request bit, and

select a cyclic shift index of the set of cyclic shift indices to indicate the first UCI bit and the second UCI bit; and

transmit the UCI message;

wherein the set of cyclic shift indices includes a first cyclic shift index, a second cyclic shift index, a third cyclic shift index, and a fourth cyclic shift index,

wherein the first cyclic shift index is at a first location and indicates a first value of the first UCI bit and a first value of the second UCI bit,

wherein the second cyclic shift index is at a second location and indicates the first value of the first UCI bit and a second value of the second UCI bit,

wherein the third cyclic shift index is at a third location and indicates a second value of the first UCI bit and the first value of the second UCI bit,

wherein the fourth cyclic shift index is at a fourth location and indicates the second value of the first UCI bit and the second value of the second UCI bit,

wherein a first distance from the first location to the second location is less than a second distance from the first location to the third location, and

wherein the first distance is less than a third distance from the first location to the fourth location.

23. The UE of claim 22 , wherein the one or more processors are further configured to:

receive an indication of the set of candidate sets of cyclic shift indices from which the set of cyclic shift indices is to be selected to indicate the scheduling request bit.

24. The UE of claim 23 , wherein the indication of the set of candidate sets of cyclic shift indices includes an indication that selection of the set of cyclic shift indices from the set of candidate sets of cyclic shift indices indicates the scheduling request bit.

25. The UE of claim 22 , wherein the UCI message is a physical uplink control channel format 0 message.

26. The UE of claim 22 , wherein the first UCI bit has a priority that is higher than a priority of the second UCI bit.

27. A method of wireless communication performed by a user equipment (UE), comprising:

generating an uplink control information (UCI) message including a scheduling request bit multiplexed with a first UCI bit and a second UCI bit, including:

selecting a set of sequences, of a set of candidate sets of sequences, to use for multiplexing the first UCI bit and the second UCI bit, the selection of the set of sequences indicating the scheduling request bit, wherein the set of sequences includes a first sequence and a second sequence that is orthogonal to the first sequence, and

multiplexing the first UCI bit and the second UCI bit based at least in part on the set of sequences by applying the first sequence to the first UCI bit and applying the second sequence to the second UCI bit;

wherein the first UCI bit having the first sequence applied is superimposed with the second UCI bit having the second sequence applied; and

transmitting the UCI message.

28. A method of wireless communication performed by a user equipment (UE), comprising:

generating an uplink control information (UCI) message including a scheduling request bit multiplexed with a first UCI bit and a second UCI bit, including:

selecting a set of cyclic shift indices, of a set of candidate sets of cyclic shift indices, to use for multiplexing the first UCI bit and the second UCI bit, the selection of the set of cyclic shift indices indicating the scheduling request bit, and

selecting a cyclic shift index of the set of cyclic shift indices to indicate the first UCI bit and the second UCI bit; and

transmitting the UCI message;

wherein the set of cyclic shift indices includes a first cyclic shift index, a second cyclic shift index, a third cyclic shift index, and a fourth cyclic shift index,

wherein the first cyclic shift index is at a first location and indicates a first value of the first UCI bit and a first value of the second UCI bit,

wherein the second cyclic shift index is at a second location and indicates the first value of the first UCI bit and a second value of the second UCI bit,

wherein the third cyclic shift index is at a third location and indicates a second value of the first UCI bit and the first value of the second UCI bit,

wherein the fourth cyclic shift index is at a fourth location and indicates the second value of the first UCI bit and the second value of the second UCI bit,

wherein a first distance from the first location to the second location is less than a second distance from the first location to the third location, and

wherein the first distance is less than a third distance from the first location to the fourth location.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2022
From: HUANG, YI; CHEN, WANSHI; GAAL, PETER; JI, TINGFANG; YANG, WEI; SRIDHARAN, GOKUL; ELSHAFIE, AHMED
To: QUALCOMM INCORPORATED
Reel/Frame 059444/0523 →
Continuity (2)
Provisional Application 63137009 · Jan 13, 2021
Related Publication 20220225381A1 · Jul 14, 2022
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