IP Library Granted Patent US 11,742,033
Granted Patent B2
US 11,742,033 · App. 17/647,509 · Granted Aug 29, 2023

Voltage generation circuit which is capable of executing high-speed boost operation

Inventors: Tatsuro Midorikawa (Kamakura, JP); Masami Masuda (Chigasaki, JP)
Assignee: Kioxia Corporation
G11C16/30H02M3/07
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Quick Facts
Patent No.
US 11,742,033
App. No.
17/647,509
Granted
Aug 29, 2023
Kind
B2
Abstract

According to one embodiment, a voltage generation circuit includes a first boost circuit, a voltage division circuit, a first detection circuit, a capacitor and a first switch. The first boost circuit outputs a first voltage. The voltage division circuit divides the first voltage. The first detection circuit is configured to detect a first monitor voltage supplied to the first input terminal, based on a reference voltage which is supplied to a second input terminal of the first detection circuit, and to control an operation of the first boost circuit. The capacitor is connected between an output terminal of the first boost circuit and the first input terminal of the first detection circuit. The first switch cuts off a connection between the capacitor and the first detection circuit, based on an output signal of the first detection circuit, until the first voltage is output from the first boost circuit.

Claims (20)

1. A voltage generation circuit comprising:

a charge pump circuit configured to output a first voltage;

a voltage division circuit configured to divide the first voltage to a second voltage;

a first amplifier having a first input terminal and a second input terminal, the first input terminal of the first amplifier configured to receive the second voltage, the second input terminal of the first amplifier configured to receive a third voltage, the first amplifier configured to output a signal which controls the charge pump circuit; and

a capacitor having a first end connected to an output terminal of the charge pump circuit and a second end connected to the first input terminal of the first amplifier via a first transistor.

2. The voltage generation circuit according to claim 1 , wherein

a first end of the first transistor is connected to the second end of the capacitor, and a second end of the first transistor is connected to the first input terminal of the first amplifier.

3. The voltage generation circuit according to claim 1 , further comprising:

a second transistor, a first end of the second transistor connected to the second end of the capacitor and a second end of the second transistor connected to a ground terminal.

4. The voltage generation circuit according to claim 3 , further comprising:

a logical circuit, an input terminal of the logical circuit connected to an output terminal of the first amplifier and a second output terminal of the logical circuit connected to a gate of the second transistor.

5. The voltage generation circuit according to claim 4 , wherein

the second transistor is configured to establish a connection between the capacitor and the ground terminal, based on an output signal from the second output terminal of the logical circuit, until the first voltage is output from the charge pump circuit.

6. The voltage generation circuit according to claim 1 , wherein the voltage division circuit includes:

a first resistance, a first end of the first resistance connected to the output terminal of the charge pump circuit and a second end of the first resistance connected to the first input terminal of the first amplifier; and

a second resistance, a first end of the second resistance connected to the second end of the first resistance and a second end of the second resistance connected to a ground terminal.

7. The voltage generation circuit according to claim 1 , further comprising:

a logical circuit, an input terminal of the logical circuit connected to an output terminal of the first amplifier and a first output terminal of the logical circuit connected to a gate of the first transistor.

8. The voltage generation circuit according to claim 7 , wherein

the first transistor is configured to cut off a connection between the capacitor and the first amplifier, based on an output signal from the first output terminal of the logical circuit, until the first voltage is output from the charge pump circuit.

Priority Claims (1)
JP 2010-245285 · Nov 1, 2010 · national
Continuity (7)
Continuation 17031656 · Sep 24, 2020
Continuation 16670862 · Oct 31, 2019
Continuation 16273979 · Feb 12, 2019
Continuation 15417489 · Jan 27, 2017
Continuation 14257501 · Apr 21, 2014
Continuation 13235437 · Sep 18, 2011
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