OTP memory and method for manufacturing thereof, and OTP circuit
A One Time Programmable (OTP) memory can have a memory cell, which includes two series diodes as a fuse structure.
1. A One Time Programmable (OTP) memory, comprising:
a first active region, a second active region, and an isolation region provided between the first active region and the second active region, wherein a conductivity type of the first active region is different from a conductivity type of the second active region;
a first diffusion region provided on the first active region and configured to be connected to a first connecting line, wherein the conductivity type of the first active region is different from a conductivity type of the first diffusion region; and
a second diffusion region provided on the second active region and configured to be connected to a second connection line,
wherein the first active region is a P-type well, and the second active region is an N-type well, and
wherein the first active region and the first diffusion region form a first diode; and the first active region and the second active region form a second diode.
2. The OTP memory according to claim 1 , wherein
the first diffusion region is an N-type diffusion region, and the second diffusion region is an N-type diffusion region.
3. The OTP memory according to claim 1 , wherein a breakdown voltage of the first diode is less than a breakdown voltage of the second diode.
4. The OTP memory according to claim 1 , wherein
the first connecting line is a word line, and the second connecting line is a bit line.
5. A method for manufacturing a One Time Programmable (OTP) memory, comprising:
providing a semiconductor substrate;
forming a semiconductor layer on the semiconductor substrate, wherein the semiconductor layer comprises a first active region and a second active region, and a conductivity type of the first active region is different from a conductivity type of the second active region;
forming an isolation region on the semiconductor layer, the isolation region being provided between the first active region and the second active region;
forming a first diffusion region on the first active region, wherein the conductivity type of the first active region is different from a conductivity type of the first diffusion region;
forming a second diffusion region on the second active region;
connecting the first diffusion region to a first connecting line; and
connecting the second diffusion region to a second connecting line;
wherein the first active region and the first diffusion region form a first diode; and
the first active region and the second active region from a second diode.
6. The method for manufacturing the OTP memory according to claim 5 , wherein
the first active region is a P-type well, and the second active region is an N-type well.
7. The method for manufacturing the OTP memory according to claim 6 , wherein
the first diffusion region is an N-type diffusion region, and the second diffusion region is an N-type diffusion region.
8. The method for manufacturing the OTP memory according to claim 5 , wherein
a breakdown voltage of the first diode is less than a breakdown voltage of the second diode.
9. The method for manufacturing the OTP memory according to claim 5 , wherein
the first connecting line is a word line, and the second connecting line is a bit line.