Transistor structures
Transistor structures for a transistor may include a first source-drain region, a second source-drain region, and a channel region between the first and second source-drain regions overlapped by a gate structure. Transistor structures may be formed in a well of a first doping type. Isolation structures having the first doping type may be formed within the well. A lightly doped implant region of a second doping type for each of the source-drain regions may be formed within the well and separated from the isolation structures. A heavily doped surface implant region of the first doping type may extend across the surface of the well and cover the lightly doped implant region of each source-drain region. The surface implant region may be formed by patterning or by a blanket implantation process across the transistor structures.
1. An image sensor pixel comprising:
a photosensitive element;
a floating diffusion region; and
a transistor coupled to the floating diffusion region, the transistor including:
a first source-drain region for a first source-drain terminal of the transistor, wherein the first source-drain region is formed in a well of a first doping type;
a second source-drain region for a second source-drain terminal of the transistor, wherein the second source-drain region is formed in the well; and
an implant layer at a surface of the well, the implant layer having the first doping type and overlapping the first source-drain region and the second source drain region.
2. The image sensor pixel defined in claim 1 , wherein the floating diffusion region is formed at one of the first or second source-drain regions of the transistor.
3. The image sensor pixel defined in claim 1 , wherein the first source-drain region includes a lightly doped implant region of a second doping type within the well and overlapped by the implant layer.
4. The image sensor pixel defined in claim 3 further comprising:
isolation structures on opposing lateral sides of the lightly doped implant region, wherein the lightly doped implant region is separated from the isolation structures by portions of the well.
5. The image sensor pixel defined in claim 4 , wherein the isolation structures are embedded within the well and have the first doping type, and the implant layer overlaps the isolation structures.
6. The image sensor pixel defined in claim 3 , wherein the first doping type is p-type and the second doping type is n-type.
7. The image sensor pixel defined in claim 1 , wherein the implant layer is heavily doped.
8. An imaging system comprising:
a charge storage structure; and
a transistor having a source-drain region coupled to the charge storage structure, wherein the source-drain region includes:
a first implant region of a first doping type formed within a well of a second doping type;
a second implant region of the first doping type that is surrounded by the first implant region and is disposed at a surface of the well;
an implant layer of the second doping type at the surface of the well, laterally surrounding the second implant region, and overlapping the first implant region and
an isolation structure within the well and separated from the first implant region by a portion of the well, wherein the implant layer overlaps the isolation structure and the portion of the well.
9. The imaging system defined in claim 8 , wherein the second implant region is more heavily doped than the first implant region.
10. The imaging system defined in claim 9 , wherein the implant layer is more heavily doped than the well.
11. The imaging system defined in claim 9 , wherein the isolation structure has the second doping type.
12. The imaging system defined in claim 11 , wherein the implant layer is more heavily doped than the isolation structure.
13. The imaging system defined in claim 9 , wherein a portion of the first implant region is disposed at the surface of the well between the second implant region and the implant layer.
14. The imaging system defined in claim 8 , wherein the source-drain region is directly connected to the charge storage structure.
15. The imaging system defined in claim 8 , wherein the imaging system is configured to be an imaging system for a vehicle.
16. A transistor comprising:
a well of a first doping type;
a lightly doped drain region of a second doping type in the well;
isolation structures of the first doping type on opposing lateral sides of the lightly doped drain region and separated from the lightly doped drain region;
a heavily doped surface implant layer of the first doping type at a surface of the well and overlapping the lightly doped drain region and the isolation structure; and
an implant region of the second doping type at the surface of the well and overlapping the lightly doped drain region.
17. The transistor defined in claim 16 further comprising:
a metal contact on the implant region.
18. The transistor defined in claim 16 , wherein the heavily doped surface implant layer laterally surrounds the implant region.
19. The transistor defined in claim 16 , wherein the first doping type is p-type and the second doping type is n-type.
20. The transistor defined in claim 16 , wherein the lightly doped drain region has a carrier concentration less than 10 16 cm −3 and the heavily doped surface implant layer has a carrier concentration greater than 10 17 cm 3 .