IP Library Granted Patent US 11,818,478
Granted Patent B2
US 11,818,478 · App. 17/657,489 · Granted Nov 14, 2023

Image pixels with coupled-gates structures

Inventors: Manuel H. Innocent (Wezemaal, BE); Robert Michael Guidash (Fairport, NY); Tomas Geurts (Haasrode, BE)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H04N25/623H04N25/75
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Quick Facts
Patent No.
US 11,818,478
App. No.
17/657,489
Granted
Nov 14, 2023
Kind
B2
Abstract

An image sensor may include an array of image pixels. The array of image pixel may be coupled to control circuitry and readout circuitry. One or more image pixels in the array may each include a coupled-gates structure coupling a photodiode at one input terminal to a capacitor at a first output terminal and to a floating diffusion region at a second output terminal. The coupled-gates structure may include a first transistor that sets a potential barrier defining overflow portions of the photodiode-generated charge. Second and third transistors in the coupled-gates structure may be modulated to transfer the overflow charge to the capacitor and to the floating diffusion region at suitable times. The second and third transistors may form a conductive path between the capacitor and the floating diffusion region for a low conversion gain mode of operation.

Claims (37)

1. An image sensor pixel comprising:

a photosensitive element;

a floating diffusion region;

a first transistor that couples the photosensitive element to the floating diffusion region;

a charge storage structure; and

a second transistor that couples the photosensitive element to the charge storage structure, wherein the first and second transistors are configured to form a conductive path between the floating diffusion region and the charge storage structure, wherein the charge storage structure has a terminal directly coupled to only one transistor, and wherein the only one transistor is the second transistor.

2. The image sensor pixel defined in claim 1 , wherein the charge storage structure comprises a capacitor.

3. The image sensor pixel defined in claim 1 further comprising:

a third transistor, wherein the first and third transistors couple the photosensitive element to the floating diffusion region.

4. The image sensor pixel defined in claim 3 , wherein the second and third transistors couple the photosensitive element to the charge storage structure.

5. The image sensor pixel defined in claim 3 , wherein the third transistor is configured to form a potential barrier that defines an overflow portion of charge generated by the photosensitive element.

6. The image sensor pixel defined in claim 5 , wherein the first and third transistors are configured to transfer the overflow portion of charge from the photosensitive element to the charge storage structure.

7. The image sensor pixel defined in claim 1 further comprising:

a reset transistor that couples the floating diffusion region to a supply voltage terminal; and

a source follower transistor that couples the floating diffusion region to a pixel output path.

8. The image sensor pixel defined in claim 7 , wherein the first transistor, the third transistor, and the reset transistor form an anti-blooming path for the photosensitive element.

9. The image sensor pixel defined in claim 1 , wherein the charge storage structure is configured to extend a storage capacity of the floating diffusion region in a low conversion gain mode of operation.

10. The image sensor pixel defined in claim 1 , wherein the image sensor pixel is configured to output a low conversion gain image signal and a high conversion gain image signal.

11. The image sensor pixel defined in claim 1 , wherein the charge storage structure has an additional terminal directly coupled to a reference voltage terminal.

12. The image sensor pixel defined in claim 1 , wherein the first and second transistors are configured to form the conductive path between the floating diffusion region and the charge storage structure for a pixel readout operation.

13. The image sensor pixel defined in claim 1 further comprising:

an additional charge storage structure coupled to the floating diffusion region.

14. The image sensor pixel defined in claim 13 further comprising:

a third transistor that couples the photosensitive element to the additional charge storage structure.

15. The image sensor pixel defined in claim 14 , wherein the first and third transistors are configured to form an additional conductive path between the floating diffusion region and the additional charge storage structure.

16. The image sensor pixel defined in claim 1 further comprising:

a third transistor, wherein the first, second, and third transistors form a coupled-gates structure and share a common terminal.

17. The image sensor pixel defined in claim 16 , wherein the third transistor couples the photosensitive element to the common terminal, wherein the first transistor couples the floating diffusion region to the common terminal, and the second transistor couples the charge storage structure to the common terminal.

18. An image sensor pixel comprising:

a photosensitive element;

a floating diffusion region;

a first transistor coupled between the photosensitive element and the floating diffusion region;

a second transistor; and

a charge storage structure coupled to the photosensitive element, wherein the charge storage structure is connected to the floating diffusion region by only one conductive path, wherein the one conductive path runs through at least the first transistor and the second transistor, and wherein the second transistor is coupled between the photosensitive element and the charge storage structure.

19. The image sensor pixel defined in claim 18 further comprising:

a third transistor, wherein the first transistor and the third transistor are coupled in series between the photosensitive element and the floating diffusion region.

20. The image sensor pixel defined in claim 18 wherein the charge storage structure comprises a capacitor.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 059847, FRAME 0433 Recorded Nov 9, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 065525/0001 →
SECURITY INTEREST Recorded May 3, 2022
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 059847/0433 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 31, 2022
From: INNOCENT, MANUEL H.; GUIDASH, ROBERT MICHAEL; GEURTS, TOMAS
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 059461/0676 →