IP Library Granted Patent US 12,211,920
Granted Patent B2
US 12,211,920 · App. 17/658,771 · Granted Jan 28, 2025

Backside ohmic contacts for semiconductor devices

Inventors: Srinivasa Reddy Yeduru (Fishkill, NY); Naveen Ganagona (Fishkill, NY); George Chang (Tempe, AZ); Byoungyong Park (Bucheon, KR); Soonjae Lee (Seoul, KR)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L29/45H01L21/26513H01L21/28568H01L21/304H01L21/30604
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Quick Facts
Patent No.
US 12,211,920
App. No.
17/658,771
Granted
Jan 28, 2025
Kind
B2
Abstract

In some aspects, the techniques described herein relate to a semiconductor device including: a substrate having a first side and a second side, the second side being opposite the first side; active circuitry disposed on the first side of the substrate; a metallic implant disposed in the substrate, the metallic implant being a blanket implant on the second side of the substrate; and a metallic layer disposed on the second side of the substrate, the metallic layer and the second side of the substrate including the metallic implant defining an ohmic contact.

Claims (39)

1. A semiconductor device comprising:

a substrate having a first side and a second side, the second side being opposite the first side;

active circuitry disposed on the first side of the substrate;

an ohmic contact including:

a metallic implant disposed in the substrate, the metallic implant being a blanket implant on the second side of the substrate; and

a metallic layer disposed on the second side of the substrate.

2. The semiconductor device of claim 1 , wherein the substrate is a silicon substrate.

3. The semiconductor device of claim 1 , wherein the metallic implant includes aluminum.

4. The semiconductor device of claim 3 , wherein the metallic implant further includes at least one of gold, nickel, platinum, palladium, silver, or copper.

5. The semiconductor device of claim 1 , wherein the active circuitry includes a power transistor.

6. The semiconductor device of claim 1 , wherein the metallic layer includes at least one of nickel vanadium, titanium, or silver.

7. The semiconductor device of claim 1 , wherein the metallic implant has an average depth of less than or equal to 10 micrometers.

8. The semiconductor device of claim 7 , wherein the metallic implant includes a plurality of metallic spikes with respective depths greater than the average depth.

9. The semiconductor device of claim 1 , wherein the metallic implant compressively strains the substrate.

10. The semiconductor device of claim 1 , wherein the blanket implant is a first blanket implant, the semiconductor device further comprising an impurity implant disposed in the substrate, the impurity implant being a second blanket implant on the second side of the substrate.

11. A method for producing a semiconductor device comprising:

producing active circuitry on a first side of a semiconductor substrate; and

forming an ohmic contact including:

performing a blanket metallic implant to form an ohmic contact on a second side of the semiconductor substrate, the second side being opposite the first side; and

forming a metallic layer on the second side of the semiconductor substrate.

12. The method of claim 11 , wherein the method further comprises:

prior to performing the blanket metallic implant:

grinding the second side of the semiconductor substrate;

performing a silicon etch on the second side of the semiconductor substrate;

performing an impurity implant on the second side of the semiconductor substrate; and

performing an anneal on the second side of the semiconductor substrate.

13. The method of claim 11 , wherein the method further comprises:

prior to performing the blanket metallic implant, performing an impurity implant on the second side of the semiconductor substrate; and

after performing the blanket metallic implant, performing an anneal on the second side of the semiconductor substrate.

14. The method of claim 11 , wherein the semiconductor substrate is a silicon substrate.

15. The method of claim 11 , wherein performing the blanket metallic implant includes implanting aluminum.

16. The method of claim 15 , wherein performing the blanket metallic implant further includes implanting at least one of gold, nickel, platinum, palladium, silver, or copper.

17. The method of claim 11 , wherein producing the active circuitry includes producing a power transistor.

18. The method of claim 11 , wherein the metallic layer includes at least one of nickel vanadium, titanium, or silver.

19. The method of claim 11 , wherein the blanket metallic implant has an average depth, in the semiconductor substrate, of less than or equal to 10 micrometers.

20. The method of claim 19 , wherein performing the blanket metallic implant includes forming a plurality of metallic spikes with respective depths in the semiconductor substrate greater than the average depth.

21. The method of claim 11 , wherein performing the blanket metallic implant includes at least one of:

heating the semiconductor substrate to a temperature between 250 degrees Celsius and 450 degrees Celsius; or

heating an implanted metallic material to a temperature between 250 degrees Celsius and 450 degrees Celsius.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS, RECORDED AT REEL 061071, FRAME 052 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, AS GRANTOR; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC., AS GRANTOR
Reel/Frame 064067/0654 →
SECURITY INTEREST Recorded Aug 4, 2022
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 061071/0525 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 18, 2022
From: YEDURU, SRINIVASA REDDY; GANAGONA, NAVEEN; CHANG, GEORGE; PARK, BYOUNGYONG; LEE, SOONJAE
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 059622/0645 →