Reading circuit for a pixel array
The present disclosure relates to a read-out circuit comprising N inputs configured to be connected to N respective outputs of a pixel array of an image sensor, with N being an integer strictly greater than 1; and N analog-to-digital converters organized in K groups, with K being an integer strictly greater than 1 and strictly less than N, and each having a first input coupled to a respective one of the N inputs and a second input. In each group, the second inputs of the analog-to-digital converters of the group are connected together, electrically decoupled from the second inputs of the analog-to-digital converters of the other groups, and configured to receive a first reference signal that is identical for all the analog-to-digital converters of the group.
1. A read-out circuit comprising:
N inputs configured to be connected to N respective outputs of a pixel array of an image sensor, with N being an integer strictly greater than 1;
N analog-to-digital converters organized in K groups, with K being an integer strictly greater than 1 and strictly less than N, and each having a first input coupled to a respective one of the N inputs and a second input, each analog-to-digital converter being a correlated double sampling-type converter,
wherein, in each group, the second inputs of the analog-to-digital converters of the group are:
connected to each other,
electrically decoupled from the second inputs of the analog-to-digital converters of the other groups, and
configured to receive an identical first reference signal for all the analog-to-digital converters of the group;
a first circuit configured to provide a second reference signal; and
for each group, a first buffer circuit configured to receive the second reference signal and to provide the first reference signal of the group to the second inputs of the analog-to-digital converters of the group, wherein the second reference signal is a voltage ramp, and the first circuit comprises a digital-to-analog converter configured to provide the second reference signal.
2. The read-out circuit according to claim 1 , wherein, for each group, the first buffer circuit configured to provide the first reference signal of the group comprises as many second buffer circuits as there are analog-to-digital converters in the group.
3. The read-out circuit according to claim 1 , wherein each group comprises at least two analog-to-digital converters and at most N/2 analog-to-digital converters.
4. The read-out circuit according to claim 1 , wherein at least K-1 groups from among the K groups each have a same number P of analog-to-digital converters, with P an integer strictly greater than 1.
5. The read-out circuit according to claim 1 , wherein each analog-to-digital converter comprises a comparator having a first input coupled to the second input of the analog-to-digital converter, and a second input coupled to the first input of the analog-to-digital converter.
6. An image sensor comprising:
an array of pixels organized in lines and columns; and
a read-out circuit comprising:
N inputs connected to N respective outputs of the array of pixels, with N being an integer strictly greater than 1;
N analog-to-digital converters organized in K groups, with K being an integer strictly greater than 1 and strictly less than N, and each having a first input coupled to a respective one of the N inputs and a second input, each analog-to-digital converter being a successive approximation register-type converter,
wherein, in each group, the second inputs of the analog-to-digital converters of the group are:
connected to each other,
electrically decoupled from the second inputs of the analog-to-digital converters of the other groups, and
configured to receive an identical first reference signal for all the analog-to-digital converters of the group;
a first circuit configured to provide a second reference signal; and
for each group, a first buffer circuit configured to receive the second reference signal and to provide the first reference signal of the group to the second inputs of the analog-to-digital converters of the group, wherein the second reference signal is a DC reference voltage.
7. The read-out circuit according to claim 2 , wherein each second buffer circuit is a follower amplifier implemented by a metal-oxide-semiconductor (MOS) transistor connected as a follower source.
8. The read-out circuit according to claim 4 , wherein the number P is between 10 and 20.
9. The read-out circuit according to claim 4 , wherein the number P is determined by a compromise between column noise and smear effect in an image provided by the image sensor.
10. The read-out circuit according to claim 5 , wherein each analog-to-digital converter comprises a counter configured to receive an output signal from the comparator of the analog-to-digital converter.
11. The image sensor according to claim 6 , wherein, for each group, the first buffer circuit configured to provide the first reference signal of the group comprises as many second buffer circuits as there are analog-to-digital converters in the group.
12. The image sensor according to claim 6 , wherein each group comprises at least two analog-to-digital converters and at most N/2 analog-to-digital converters.
13. The image sensor according to claim 6 , wherein at least K-1 groups from among the K groups each have a same number P of analog-to-digital converters, with P an integer strictly greater than 1.
14. A read-out circuit comprising:
N inputs configured to be connected to N respective outputs of a pixel array of an image sensor, with N being an integer strictly greater than 1;
N analog-to-digital converters organized in K groups, with K being an integer strictly greater than 1 and strictly less than N, and each having a first input coupled to a respective one of the N inputs and a second input,
wherein, in each group, the second inputs of the analog-to-digital converters of the group are:
connected to each other,
electrically decoupled from the second inputs of the analog-to-digital converters of the other groups, and
configured to receive an identical first reference signal for all the analog-to-digital converters of the group;
a first circuit configured to provide a second reference signal; and
for each group, a respective buffer circuit configured to receive the second reference signal and to provide the first reference signal of the group to the second inputs of the analog-to-digital converters of the group, the respective buffer circuit comprising as many follower amplifiers as there are analog-to-digital converters in the group.
15. The read-out circuit of claim 14 , wherein each follower amplifier is implemented by a metal-oxide-semiconductor (MOS) transistor connected as a follower source.
16. The read-out circuit according to claim 14 , wherein each group comprises at least two analog-to-digital converters and at most N/2 analog-to-digital converters.
17. The read-out circuit according to claim 14 , wherein at least K-1 groups from among the K groups each have a same number P of analog-to-digital converters, with P an integer strictly greater than 1.
18. The read-out circuit according to claim 14 , wherein each analog-to-digital converter is a correlated double sampling-type converter.
19. The read-out circuit according to claim 14 , wherein each analog-to-digital converter comprises a comparator having a first input coupled to the second input of the analog-to-digital converter.
20. The read-out circuit according to claim 17 , wherein the number P is between 10 and 20.
21. The read-out circuit according to claim 17 , wherein the number P is determined by a compromise between column noise and smear effect in an image provided by the image sensor.