IP Library Granted Patent US 11,876,116
Granted Patent B2
US 11,876,116 · App. 17/660,888 · Granted Jan 16, 2024

Method for manufacturing a grid

Inventors: Adolf Schoner (Hässelby, SE); Sergey Reshanov (Upplands-Väsby, SE); Nicolas Thierry-Jebali (Stockholm, SE); Hossein Elahipanah (Sollentuna, SE)
Assignee: II-VI DELAWARE, INC.
H01L29/402H01L21/02529H01L21/02634H01L21/26513H01L21/28537H01L21/3065H01L21/30625H01L21/324H01L29/401
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Quick Facts
Patent No.
US 11,876,116
App. No.
17/660,888
Granted
Jan 16, 2024
Kind
B2
Abstract

A grid is manufactured with a combination of ion implant and epitaxy growth. The grid structure is made in a SiC semiconductor material with the steps of a) providing a substrate comprising a doped semiconductor SiC material, said substrate comprising a first layer (n 1 ), b) by epitaxial growth adding at least one doped semiconductor SiC material to form separated second regions (p 2 ) on the first layer (n 1 ), if necessary with aid of removing parts of the added semiconductor material to form separated second regions (p 2 ) on the first layer (n 1 ), and c) by ion implantation at least once at a stage selected from the group consisting of directly after step a), and directly after step b); implanting ions in the first layer (n 1 ) to form first regions (p 1 ). It is possible to manufacture a grid with rounded corners as well as an upper part with a high doping level. It is possible to manufacture a component with efficient voltage blocking, high current conduction, low total resistance, high surge current capability, and fast switching.

Claims (32)

1. A method for manufacture of a grid structure in a SiC semiconductor material, the method comprising the steps of:

(a) providing a substrate comprising a doped semiconductor SiC material, the substrate comprising a first layer of a first conductivity type;

(b) by epitaxial growth adding at least one doped semiconductor SiC material to form separated second regions of a second conductivity type opposite to the first conductivity type on the first layer;

(c) by ion implantation at least once at a stage selected from the group consisting of after step (a) and after step (b), implanting ions in the first layer to form first regions of a second conductivity type opposite to the first conductivity type, wherein each of the separated second regions is in contact with one of the first regions; and

(d) by epitaxial growth, growing a second layer on the separated second regions and on the first layer.

2. The method of claim 1 , wherein the epitaxial growth of the second layer is carried out so that a thickness of the second layer is in an interval of 0.5 μm to 3 μm.

3. The method of claim 1 , comprising performing a surface planarization step after growing of the second layer.

4. The method of claim 1 , comprising making a Schottky contact on at least a part of the second layer.

5. A method for manufacture of a grid structure in a SiC semiconductor material, the method comprising the steps of:

(a) providing a substrate comprising a doped semiconductor SiC material, the substrate comprising a first layer of a first conductivity type;

(b) by epitaxial growth, growing a second layer on the first layer followed by etching through an entirety of the second layer on certain areas;

(c) by epitaxial growth, adding at least one doped semiconductor SiC material at the certain areas to form separated second regions of a second conductivity type opposite to the first conductivity type on the first layer; and

(d) by ion implantation, at least once at a stage selected from the group consisting of after step (a) and after step (b), implanting ions in the first layer to form first regions of a second conductivity type opposite to the first conductivity type, wherein each of the separated second regions is in contact with one of the first regions.

6. A method for manufacture of a grid structure in a SiC semiconductor material, the method comprising the steps of:

(a) providing a substrate comprising a doped semiconductor SiC material, the substrate comprising a first layer of a first conductivity type;

(b) by epitaxial growth adding at least one doped semiconductor SiC material to form separated second regions of a second conductivity type opposite to the first conductivity type on the first layer;

(c) by ion implantation at least once at a stage selected from the group consisting of after step (a) and after step (b), implanting ions in the first layer to form first regions of a second conductivity type opposite to the first conductivity type, wherein each of the separated second regions is in contact with one of the first regions; and

(d) making an Ohmic contact directly on top of at least one of the separated second regions.

7. The method of claim 6 , wherein making the Ohmic contact directly on top of the at least one of the separated second regions further comprises partial removal of an optional second layer to expose the at least one of the separated second regions.

8. A grid structure in a semiconductor material manufactured with the method according to claim 1 .

9. A device manufactured with the method according to claim 1 .

10. A grid structure in a semiconductor material manufactured with the method according to claim 5 .

11. A device manufactured with the method according to claim 5 .

12. A grid structure in a semiconductor material manufactured with the method according to claim 6 .

13. A device manufactured with the method according to claim 6 .

14. A method for manufacture of a grid structure in a SiC semiconductor material, the method comprising the steps of:

(a) providing a substrate comprising a doped semiconductor SiC material, the substrate comprising a first layer of a first conductivity type;

(b) by epitaxial growth, adding at least one doped semiconductor SiC material to form separated second regions of a second conductivity type opposite to the first conductivity type on the first layer; and

(c) by ion implantation, implanting ions through the separated second regions into the first layer to form first regions of a second conductivity type opposite to the first conductivity type,

wherein each of the separated second regions is in contact with one of the first regions.

15. A grid structure in a semiconductor material manufactured with the method according to claim 14 .

16. A device manufactured with the method according to claim 14 .

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2024
From: II-VI DELAWARE, INC.
To: II-VI ADVANCED MATERIALS, LLC
Reel/Frame 066105/0979 →
PARTIAL TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Dec 4, 2023
From: JPMORGAN CHASE BANK, N.A.
To: II-VI DELAWARE, INC.
Reel/Frame 065773/0129 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2023
From: SCHÖNER, ADOLF; RESHANOV, SERGEY; THIERRY-JEBALI, NICOLAS; ELAHIPANAH, HOSSEIN
To: ASCATRON AB
Reel/Frame 065641/0633 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2023
From: ASCATRON AB
To: II-VI DELAWARE, INC.
Reel/Frame 065641/0645 →
SECURITY INTEREST Recorded Jul 1, 2022
From: II-VI INCORPORATED; II-VI DELAWARE, INC.; M CUBED TECHNOLOGIES, INC.; II-VI PHOTONICS (US), INC.; PHOTOP TECHNOLOGIES, INC.; COHERENT, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 060562/0254 →
Priority Claims (1)
SE 17511387 · Sep 15, 2017 · national
Continuity (2)
Continuation 16647094
Related Publication 20220254887A1 · Aug 11, 2022