IP Library Granted Patent US 11,776,951
Granted Patent B2
US 11,776,951 · App. 17/662,890 · Granted Oct 3, 2023

TVS diode circuit with high energy dissipation and linear capacitance

Inventors: Liping Ren (Los Angeles, CA); William Allen Russell (Thousand Oaks, CA)
Assignee: Semtech Corporation
H01L27/0255G05F3/18H01L23/62H01L27/02H01L27/0814H02H3/202H02H9/042H02H9/046H02H9/04
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Quick Facts
Patent No.
US 11,776,951
App. No.
17/662,890
Granted
Oct 3, 2023
Kind
B2
Abstract

A TVS circuit having a first diode with a cathode coupled to a first terminal and an anode coupled to a first node. A second diode has an anode coupled to a second node and a cathode coupled to a third node. A third diode is coupled between the first node and second node. A fourth diode is coupled between the first node and third node. A fifth diode is coupled between the second node and a second terminal. A sixth diode is coupled between the second terminal and the third node. A seventh diode can be coupled between the second terminal and an intermediate node between the fifth diode and sixth diode. The first diode is disposed on a first semiconductor die, while the second diode is disposed on a second semiconductor die. Alternatively, the first diode and second diode are disposed on a single semiconductor die.

Claims (44)

1. A transient voltage suppression (TVS) circuit, comprising:

a first diode including a cathode coupled to a first terminal of the TVS circuit and an anode coupled to a first node;

a silicon controlled rectifier including an anode coupled to a second node and a cathode coupled to a third node;

a second diode including a cathode coupled to the first node and an anode coupled to the second node;

a third diode including an anode coupled to the first node and a cathode coupled to the third node;

a fourth diode including an anode coupled to the second node and a cathode coupled to a second terminal of the TVS circuit; and

a fifth diode including an anode coupled to the second terminal and a cathode couple to the third node to provide the TVS circuit.

2. The TVS circuit of claim 1 , wherein the first diode is disposed within a high voltage portion of the TVS circuit.

3. The TVS circuit of claim 1 , wherein the silicon controlled rectifier is disposed within a low voltage portion of the TVS circuit.

4. The TVS circuit of claim 1 , wherein the first diode and silicon controlled rectifier are disposed on a common semiconductor die.

5. The TVS circuit of claim 1 , wherein the first diode is disposed on a first semiconductor die and the silicon controlled rectifier is disposed on a second semiconductor die.

6. The TVS circuit of claim 1 , wherein the silicon controlled rectifier includes:

a first transistor comprising a first conduction terminal coupled to the second node; and

a second transistor comprising a first conduction terminal coupled to a control terminal of the first transistor, a control terminal coupled to a second conduction terminal of the first transistor, and a second conduction terminal coupled to the third node.

7. A transient voltage suppression (TVS) circuit, comprising:

a first TVS diode coupled between a first terminal of the TVS circuit and a first node;

a silicon controlled rectifier including an anode coupled to a second node and a cathode coupled to a third node; and

a diode bridge coupled between the second node and third node and a second terminal of the TVS circuit, wherein the diode bridges include,

(a) a second diode comprising a cathode coupled to the first node and an anode coupled to the second node,

(b) a third diode comprising an anode coupled to the first node and a cathode coupled to the third node,

(c) a fourth diode comprising an anode coupled to the second node and a cathode coupled to a second terminal of the TVS circuit, and

(d) a fifth diode comprising an anode coupled to the second terminal and a cathode couple to the third node.

8. The TVS circuit of claim 7 , further including a second TVS diode coupled between the second terminal and an intermediate node of the diode bridge.

9. The TVS circuit of claim 7 , wherein the first TVS diode and silicon controlled rectifier are disposed on a common semiconductor die.

10. The TVS circuit of claim 7 , wherein the first TVS diode is disposed on a first semiconductor die and the silicon controlled rectifier is disposed on a second semiconductor die.

11. The TVS circuit of claim 7 , wherein the silicon controlled rectifier includes:

a first transistor comprising a first conduction terminal coupled to the second node; and

a second transistor comprising a first conduction terminal coupled to a control terminal of the first transistor, a control terminal coupled to a second conduction terminal of the first transistor, and a second conduction terminal coupled to the third node.

12. The TVS circuit of claim 7 , wherein the first TVS diode is disposed within a high voltage portion of the TVS circuit, and the silicon controlled rectifier is disposed within a low voltage portion of the TVS circuit.

13. A method of making a transient voltage suppression (TVS) circuit, comprising:

providing a first TVS diode coupled between a first terminal of the TVS circuit and a first node;

providing a silicon controlled rectifier including an anode coupled to a second node and a cathode coupled to a third node; and

providing a diode bridge coupled between the second node and third node and a second terminal of the TVS circuit by,

(a) providing a second diode comprising a cathode coupled to the first node and an anode coupled to the second node,

(b) providing a third diode comprising an anode coupled to the first node and a cathode coupled to the third node,

(c) providing a fourth diode comprising an anode coupled to the second node and a cathode coupled to a second terminal of the TVS circuit, and

(d) providing a fifth diode comprising an anode coupled to the second terminal and a cathode couple to the third node.

14. The method of claim 13 , further including providing a second TVS diode coupled between the second terminal and an intermediate node of the diode bridge.

15. The method of claim 13 , wherein the first TVS diode and silicon controlled rectifier are disposed on a common semiconductor die.

16. The method of claim 13 , wherein the first TVS diode is disposed on a first semiconductor die and the silicon controlled rectifier is disposed on a second semiconductor die.

17. The method of claim 13 , wherein providing the silicon controlled rectifier includes:

providing a first transistor comprising a first conduction terminal coupled to the second node; and

providing a second transistor comprising a first conduction terminal coupled to a control terminal of the first transistor, a control terminal coupled to a second conduction terminal of the first transistor, and a second conduction terminal coupled to the third node.

18. The method of claim 13 , wherein the first TVS diode is disposed within a high voltage portion of the TVS circuit, and the silicon controlled rectifier is disposed within a low voltage portion of the TVS circuit.

Assignments (2)
GRANT OF SECURITY INTEREST IN PATENT RIGHTS Recorded Jan 12, 2023
From: SEMTECH CORPORATION; TRIUNE SYSTEMS, L.L.C.; TRIUNE IP, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 062389/0057 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2022
From: REN, LIPING; RUSSELL, WILLIAM ALLEN
To: SEMTECH CORPORATION
Reel/Frame 059892/0078 →
Continuity (2)
Continuation 16788034 · Feb 11, 2020
Related Publication 20220271027A1 · Aug 25, 2022