IP Library Granted Patent US 12,401,327
Granted Patent B2
US 12,401,327 · App. 17/663,483 · Granted Aug 26, 2025

Low-noise amplifier (LNA) with high power supply rejection ratio (PSRR)

Inventors: Alexander Heubi (La Chaux-de-Fonds, CH); Onur Kazanc (Boudry, CH)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H03F3/193H03F1/301H03F2200/171H03F2200/294H03F2200/451
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Quick Facts
Patent No.
US 12,401,327
App. No.
17/663,483
Granted
Aug 26, 2025
Kind
B2
Abstract

A low-noise amplifier includes a low-noise amplifier stage and a filtering and biasing stage. The low-noise amplifier stage receives an input signal and provides a first output signal in response thereto. The low-noise amplifier stage includes a gain element for proving the first output signal, and at least one lowpass filter circuit in series between a first power supply voltage terminal and the gain element having a conductivity determined by lowpass filtering a signal at a bias terminal, and a filtering and biasing stage having an input for receiving the first output signal, and an output for providing a second output signal, and at least one cascode element having a first current conduction path coupled in series between the bias terminal and the output, and having a predetermined filter characteristic.

Claims (50)

1. A low-noise amplifier, comprising:

a low-noise amplifier stage for receiving an input signal and providing a first output signal in response thereto, said low-noise amplifier stage comprising:

a gain element for providing said first output signal; and

at least one lowpass filter circuit in series between a first power supply voltage terminal and said gain element and having a conductivity determined by lowpass filtering a signal at a bias terminal, and

a filtering and biasing stage having an input for receiving said first output signal, and an output for providing a second output signal, and at least one cascode element having a first current conduction path coupled in series between said bias terminal and said output, and having a predetermined filter characteristic.

2. The low-noise amplifier of claim 1 , wherein said predetermined filter characteristic comprises a bandpass characteristic.

3. The low-noise amplifier of claim 2 , further comprising:

at least one bandpass stage having an input for receiving said second output signal, and an output for providing an output of the low-noise amplifier, each of said at least one bandpass stage having a respective cascode element coupled in series between said first power supply voltage terminal and a respective output, and having a bandpass characteristic.

4. The low-noise amplifier of claim 1 , wherein said predetermined filter characteristic comprises a high pass characteristic.

5. The low-noise amplifier of claim 1 , wherein each of said at least one lowpass filter circuit comprises:

a transistor having a first current electrode, a control electrode, and a second current electrode, wherein said second current electrode of said transistor of a first one of said at least one lowpass filter circuit is coupled to said output of said gain element, and said first current electrode of said transistor of a last one of said at least one lowpass filter circuit is coupled to said first power supply voltage terminal;

a resistor having a first terminal coupled to said bias terminal, and a second terminal coupled to said control electrode of said transistor; and

a capacitor having a first terminal coupled to said control electrode of said transistor, and a second terminal coupled to a second power supply voltage terminal.

6. The low-noise amplifier of claim 1 , wherein said low-noise amplifier stage further comprises an enable transistor coupled between said at least one lowpass filter circuit and said output of said gain element.

7. The low-noise amplifier of claim 6 , wherein said bias terminal receives a bias current.

8. A low-noise amplifier, comprising:

a low-noise amplifier stage having a first gain element with an input for receiving an input signal, and an output for providing a first amplified signal, and at least one lowpass filter circuit each having an input coupled to a bias terminal and a first current conduction path coupled between a first power supply voltage terminal and said output of said first gain element;

a bandpass and biasing stage having a second gain element with an input coupled to said output of said first gain element, and an output for providing a second amplified signal, and at least one cascode element having an input coupled to said bias terminal, and a second current conduction path coupled in series between said bias terminal and said output of said second gain element; and

at least one bandpass stage coupled in series, each having a respective gain element with an input coupled to an output of a previous bandpass stage, and an output for providing a corresponding amplified signal, and at least one corresponding cascode element having an input coupled to said bias terminal, and a respective current conduction path coupled in series between said first power supply voltage terminal and said output of a corresponding previous gain element.

9. The low-noise amplifier of claim 8 , wherein each of said first gain element, said second gain element, and said respective gain element of said at least one bandpass stage comprises an N-channel metal-oxide-semiconductor (MOS) transistor.

10. The low-noise amplifier of claim 8 , wherein each of said at least one lowpass filter circuit comprises:

a transistor having a first current electrode, a control electrode, and a second current electrode, wherein said second current electrode of said transistor of a first one of said at least one lowpass filter circuit is coupled to said output of said first gain element, and said first current electrode of said transistor of a last one of said at least one lowpass filter circuit is coupled to said first power supply voltage terminal;

a resistor having a first terminal coupled to said bias terminal, and a second terminal coupled to said control electrode of said transistor; and

a capacitor having a first terminal coupled to said control electrode of said transistor, and a second terminal coupled to a second power supply voltage terminal.

11. The low-noise amplifier of claim 8 , wherein said low-noise amplifier stage comprises a first enable transistor coupled between said at least one lowpass filter circuit and said output of said first gain element.

12. The low-noise amplifier of claim 11 , wherein said bandpass and biasing stage comprises a second enable transistor coupled between said at least one cascode element and said output of said second gain element, and each of said at least one bandpass stage comprises a respective enable transistor coupled between said at least one respective cascode element and said output of said respective gain element.

13. The low-noise amplifier of claim 11 , wherein said bias terminal receives a bias current.

14. The low-noise amplifier of claim 8 , wherein said bandpass and biasing stage further comprises a bandpass network coupled between said input and said output thereof.

15. The low-noise amplifier of claim 14 , wherein said bandpass network further comprises:

a first resistor having a first terminal coupled to said output of said first gain element, and a second terminal;

a first capacitor having a first terminal coupled to said second terminal of said first resistor, and a second terminal coupled to said output of said second gain element;

a second capacitor having a first terminal coupled to said second terminal of said first resistor, and a second terminal coupled to said input of said second gain element; and

a second resistor having a first terminal coupled to said output of said second gain element, and a second terminal coupled to said input of said second gain element.

16. A method of amplifying an input signal to provide an output signal with a very high power-supply rejection ratio (PSRR), comprising:

amplifying a radio-frequency (RF) input signal using a first gain element coupled between a first power supply voltage terminal and a second power supply voltage terminal and providing an amplified signal in response to said amplifying;

biasing said first gain element, said biasing comprising modulating a conductivity of at least one cascode transistor, and said biasing further comprising:

generating a bias voltage at a bias terminal using a bias current;

lowpass filtering said bias voltage to form a lowpass filtered bias voltage; and

biasing a control electrode of each of said at least one cascode transistor using said lowpass filtered bias voltage; and

creating said bias voltage in response to said amplified signal.

17. The method of claim 16 , wherein creating said bias voltage in response to said amplified signal comprises:

bandpass filtering said amplified signal and forming a bandpass filtered amplified signal in response;

modulating a conductivity of a second gain element in response to said bandpass filtered amplified signal, and generating a second amplified signal in response to said modulating; and

biasing said second gain element using at least one cascode element having a control electrode coupled to said bias terminal, and a second current conduction path coupled in series between said bias terminal and a current conduction path of said second gain element.

18. The method of claim 17 , further comprising:

bandpass filtering said second amplified signal in at least one bandpass stage; and

forming the output signal in response to said bandpass filtering.

19. The method of claim 16 , wherein:

amplifying said RF input signal using said first gain element comprises amplifying said RF input signal using an N-channel MOS transistor.

20. The method of claim 16 , wherein modulating said conductivity of said at least one cascode transistor further comprises modulating a bulk terminal of an N-channel MOS transistor using said lowpass filtered bias voltage.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS, RECORDED AT REEL 061071, FRAME 052 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, AS GRANTOR; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC., AS GRANTOR
Reel/Frame 064067/0654 →
SECURITY INTEREST Recorded Aug 4, 2022
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 061071/0525 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2022
From: HEUBI, ALEXANDER; KAZANC, ONUR
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 059916/0153 →
Continuity (2)
Provisional Application 63260464 · Aug 20, 2021
Related Publication 20230055295A1 · Feb 23, 2023
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