Phase-aligning multiple synthesizers
Embodiments of the present invention synchronize multiple synthesizers, such as phase-locked loops (PLLs), in a manner that does not require communication or coordination between the synthesizers. Specifically, each synthesizer is part of a synthesizer circuit that includes a synthesizer (e.g., a PLL), a phase measurement circuit, and a synchronization circuit. A common reference signal (e.g., an alternating clock signal) is provided to the synthesizer circuits. In one exemplary embodiment, in each synthesizer circuit, the phase measurement circuit measures a phase difference between the reference signal and a corresponding output of the synthesizer, and the synchronization circuit adjusts the synthesizer operation based on the measured phase difference in such a way that all of the synthesizers operate in-phase with one another relative to the common reference signal, without having any communication or coordination between the two synthesizer circuits other than provision of the common reference signal.
1. A synthesizer system comprising:
a plurality of synthesizer circuits coupled to receive a common reference signal and a common control signal to initiate a number of synthesizer measurement/adjustment cycles including at least one of an initial synchronization or a subsequent resynchronization, each synthesizer circuit comprising:
a synthesizer having a synthesizer input coupled to receive the common reference signal and a synthesizer output derived from the common reference signal;
a measurement circuit having a first input coupled to receive the common reference signal, a second input coupled to receive the synthesizer output, and a measurement output for providing one or more measurement values; and
a synchronization circuit coupled to the synthesizer and coupled to receive the measurement output,
wherein, in each synthesizer measurement/adjustment cycle initiated by the common control signal:
the measurement circuit is configured to provide one or more measurement values for the cycle in response to the common control signal, each measurement value representing a time or phase difference between the common reference signal on the first input and the synthesizer output on the second input; and
the synchronization circuit is configured to phase-adjust operation of the synthesizer independently of the other synthesizers in response to the common control signal based on the one or more measurement values for the cycle to phase-align the synthesizer output with the other synthesizer outputs based on the common reference signal received by the plurality of synthesizer circuits without any coordination between the synchronization circuits.
2. A system according to claim 1 , wherein the measurement circuit comprises a time-to-digital converter.
3. A system according to claim 1 , wherein the synthesizer comprises a phase-locked loop.
4. A system according to claim 3 , wherein the synchronization circuit comprises a delta sigma modulator of the phase-locked loop.
5. A system according to claim 1 , wherein the synchronization circuit comprises a delay circuit.
6. A system according to claim 5 , wherein the delay circuit comprises delay lines.
7. A system according to claim 1 , further comprising:
a controller configured to determine a phase adjustment value for a given synthesizer circuit based on one or more measurement values from the given synthesizer circuit.
8. A system according to claim 7 , wherein the controller is part of the given synthesizer circuit.
9. A system according to claim 7 , wherein the controller is external to the given synthesizer circuit.
10. A system according to claim 7 , wherein the phase adjustment value comprises a negative time value.
11. A system according to claim 7 , wherein the phase adjustment value comprises a phase offset.
12. A system according to claim 7 , wherein the phase adjustment value is based on a plurality of measurement values.
13. A system according to claim 12 , wherein the phase adjustment value comprises an average of the plurality of measurement values.
14. A system according to claim 7 , wherein the controller is configured to provide the phase adjustment value to a phase modulation port of the synthesizer.
15. A system according to claim 1 , wherein the common reference signal is an alternating clock signal.
16. A system according to claim 1 , further comprising:
a circuit configured to provide the common reference signal.
17. A method of phase aligning multiple synthesizers, the method comprising:
providing a common reference signal and a common control signal to each of a plurality of synthesizers, the common control signal initiating a number of synthesizer measurement/adjustment cycles including at least one of an initial synchronization or a subsequent resynchronization; and
for each synthesizer measurement/adjustment cycle initiated by the common control signal:
providing, by each synthesizer, one or more measurement values for the cycle, each measurement value representing a time or phase difference between the common reference signal and a synthesizer output derived from the common reference signal; and
phase-adjusting, by each synthesizer independently of the other synthesizers, operation of the synthesizer based on the one or more measurement values for the cycle to phase-align the synthesizer output with the other synthesizer outputs based on the common reference signal received by the plurality of synthesizer circuits without any coordination between the synchronization circuits.
18. A method according to claim 17 , wherein phase-adjusting operation of the synthesizer based on the one or more measurement values comprises:
determining a phase adjustment value for the synthesizer based on one or more measurement values from the synthesizer.
19. A method according to claim 18 , wherein the phase adjustment value is one of (a) a negative time value or (b) a phase offset.
20. A system according to claim 1 , further comprising:
a controller configured to provide the common control signal to initiate the number of measurement/adjustment cycles.
21. A synthesizer circuit for a synthesizer system having a plurality of synthesizer circuits, each of the synthesizer circuits structurally the same as the synthesizer circuit for the synthesizer system, the synthesizer circuit comprising:
a reference input for receiving a common reference signal that is provided to the plurality of synthesizer circuits;
a control input for receiving a common control signal that is provided to the plurality of synthesizer circuits to initiate a number of synthesizer measurement/adjustment cycles including at least one of an initial synchronization or a subsequent resynchronization;
a synthesizer having a synthesizer input coupled to receive the common reference signal and a synthesizer output having a phase and frequency derived from the common reference signal;
a measurement circuit having a first input coupled to receive the common reference signal, a second input coupled to receive the synthesizer output, and a measurement output for providing one or more measurement values; and
a synchronization circuit coupled to the synthesizer and coupled to receive the measurement output,
wherein, in each synthesizer measurement/adjustment cycle initiated by the common control signal:
the measurement circuit is configured to provide one or more measurement values for the cycle in response to the common control signal, each measurement value representing a time or phase difference between the common reference signal on the first input and the synthesizer output on the second input; and
the synchronization circuit is configured to phase-adjust operation of the synthesizer independently of the other synthesizers in response to the common control signal based on the one or more measurement values for the cycle to phase-align the synthesizer output with the other synthesizer outputs based on the common reference signal received by the plurality of synthesizer circuits without any coordination between the synchronization circuits.
22. A synthesizer circuit according to claim 21 , wherein the measurement circuit comprises a time-to-digital converter.
23. A synthesizer circuit according to claim 21 , wherein the synthesizer comprises a phase-locked loop.
24. A synthesizer circuit according to claim 23 , wherein the synchronization circuit comprises a delta sigma modulator of the phase-locked loop.
25. A synthesizer circuit according to claim 21 , wherein the synchronization circuit comprises a delay circuit.
26. A synthesizer circuit according to claim 25 , wherein the delay circuit comprises delay lines.
27. A synthesizer circuit according to claim 21 , further comprising:
a controller configured to determine a phase adjustment value for the synthesizer circuit based on one or more measurement values from the synthesizer circuit.
28. A synthesizer circuit according to claim 27 , wherein the phase adjustment value comprises a negative time value.
29. A synthesizer circuit according to claim 27 , wherein the phase adjustment value comprises a phase offset.
30. A synthesizer circuit according to claim 27 , wherein the phase adjustment value is based on a plurality of measurement values.
31. A synthesizer circuit according to claim 30 , wherein the phase adjustment value comprises an average of the plurality of measurement values.
32. A synthesizer circuit according to claim 27 , wherein the controller is configured to provide the phase adjustment value to a phase modulation port of the synthesizer.
33. A synthesizer circuit according to claim 21 , wherein the common reference signal is an alternating clock signal.