IP Library Granted Patent US 12,488,986
Granted Patent B2
US 12,488,986 · App. 17/688,068 · Granted Dec 2, 2025

Selective gas etching for self-aligned pattern transfer

Inventors: John Christopher Arnold (North Chatham, NY); Sean D. Burns (Hopewell Junction, NY); Yann Alain Marcel Mignot (Slingerlands, NY); Yongan Xu (Albany, NY)
Assignee: Adeia Semiconductor Solutions LLC
H01L21/0337H01L21/02123H01L21/0217H01L21/02186H01L21/0276H01L21/0332H01L21/30604H01L21/30621H01L21/3065H01L21/308H01L21/3086H01L21/31H01L21/31116H01L21/31122H01L21/31138H01L21/31144H01L21/76816H01L23/49822H01L23/49838
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Quick Facts
Patent No.
US 12,488,986
App. No.
17/688,068
Granted
Dec 2, 2025
Kind
B2
Abstract

Selective gas etching for self-aligned pattern transfer uses a first block and a separate second block formed in a sacrificial layer to transfer critical dimensions to a desired final layer using a selective gas etching process. The first block is a first hardmask material that can be plasma etched using a first gas, and the second block is a second hardmask material that can be plasma etched using a second gas separate from the first gas. The first hardmask material is not plasma etched using the second gas, and the second hardmask material is not plasma etched using the first gas.

Claims (16)

1 . A semiconductor device comprising:

a patterned layer comprising a plurality of features that comprise a plurality of first features each having a spacer dimension in a first horizontal direction, a second feature having a mandrel critical dimension in the first horizontal direction, and a third feature having a non-mandrel critical dimension in the first horizontal direction, wherein:

the plurality of features are spaced apart from one another by mandrel trenches or non-mandrel trenches formed in the patterned layer;

the mandrel trenches each have a first trench dimension in the first horizontal direction and the non-mandrel trenches each have a second trench dimension in the first horizontal direction;

each of the plurality of first features comprises (i) a first side defined by a first mandrel trench and (ii) a second opposite side defined by a first non-mandrel trench, both sides extending in a second horizontal direction perpendicular to the first horizontal direction;

the second feature comprises (i) a first side defined by a second non-mandrel trench and (ii) a second opposite side defined by a third non-mandrel trench, both sides extending in the second horizontal direction; and

the third feature comprises (i) a first side defined by a second mandrel trench and (ii) a second opposite side defined by a third mandrel trench, both sides extending in the second horizontal direction.

2 . The semiconductor device of claim 1 , wherein the plurality of features comprise silicon.

3 . The semiconductor device of claim 1 , wherein the plurality of features comprise a semiconductor material.

4 . The semiconductor device of claim 1 , wherein the plurality of features comprises a titanium nitride.

5 . The semiconductor device of claim 1 , wherein the second feature terminates a mandrel trench extending in the second horizontal direction.

6 . The semiconductor device of claim 1 , wherein the third feature terminates a non-mandrel trench extending in the second horizontal direction.

7 . The semiconductor device of claim 1 , wherein the second feature terminates a trench having a dimension in the first horizontal direction that is substantially the same as the first trench dimension.

8 . The semiconductor device of claim 1 , wherein the third feature terminates a trench having a dimension in the first horizontal direction that is substantially the same as the second trench dimension.

9 . The semiconductor device of claim 1 , wherein the second feature terminates a mandrel-trench and the third feature terminates a non-mandrel trench.

10 . The semiconductor device of claim 1 , wherein an odd number of the plurality of first features are disposed between the second and third features.

Assignments (5)
CHANGE OF NAME Recorded Sep 27, 2024
From: TESSERA LLC
To: ADEIA SEMICONDUCTOR SOLUTIONS LLC
Reel/Frame 069067/0410 →
SECURITY INTEREST Recorded May 3, 2023
From: ADEIA GUIDES INC.; ADEIA IMAGING LLC; ADEIA MEDIA HOLDINGS LLC; ADEIA MEDIA SOLUTIONS INC.; ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC.; ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.; ADEIA SEMICONDUCTOR INC.; ADEIA SEMICONDUCTOR SOLUTIONS LLC; ADEIA SEMICONDUCTOR TECHNOLOGIES LLC; ADEIA SOLUTIONS LLC
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 063529/0272 →
CHANGE OF NAME Recorded May 27, 2022
From: TESSERA, INC.
To: TESSERA LLC
Reel/Frame 060205/0725 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2022
From: ARNOLD, JOHN CHRISTOPHER; BURNS, SEAN D.; MIGNOT, YANN ALAIN MARCEL; XU, YONGAN
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 059184/0378 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2022
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: TESSERA, INC.
Reel/Frame 059184/0425 →
Continuity (5)
Continuation 17181269 · Feb 22, 2021
Continuation 16682588 · Nov 13, 2019
Continuation 16001426 · Jun 6, 2018
Continuation 15284862 · Oct 4, 2016
Related Publication 20220262636A1 · Aug 18, 2022
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