Patent Assignment
Reel/Frame 069067/0410
Change of Name
Recorded: 2024-09-27
Pages: 7
Assignor
TESSERA LLC
Executed: 2022-08-15
Assignee
ADEIA SEMICONDUCTOR SOLUTIONS LLC
3025 ORCHARD PARKWAY, SAN JOSE, CALIFORNIA, 95134
Covered Properties
(98)
Stackable Molded Microelectronic Packages with Area Array Unit Connectors
Vias in Porous Substrates
High Density Three-Dimensional Integrated Capacitors
Methods and Structure to Form High K Metal Gate Stack with Single Work-Function Metal
High Density Three-Dimensional Integrated Capacitors
Semiconductor Device with Reduced via Resistance
Interconnect Structure with Capping Layer and Barrier Layer
Vias in Porous Substrates
Minimizing Shorting Between Finfet Epitaxial Regions
Patent:
9,443,853 →
Application:
14/680,099 →
Finfet Devices
Stackable Molded Microelectronic Packages with Area Array Unit Connectors
Interconnect Structure with Barrier Layer
High Density Three-Dimensional Integrated Capacitors
Middle-Of-Line (Mol) Capacitance Reduction for Self-Aligned Contact in Gate Stack
Advanced Copper Interconnects with Hybrid Microstructure
Sram Design to Facilitate Single Fin Cut in Double Sidewall Image Transfer Process
Patent:
9,564,446 →
Application:
14/971,212 →
Semiconductor Device with Reduced via Resistance
Semiconductor Device with Reduced via Resistance
Finfet Devices
Finfet Devices
Minimizing Shorting Between Finfet Epitaxial Regions
Semiconductor Structures Including Middle-of-Line (Mol) Capacitance Reduction for Self-Aligned Contact in Gate Stack
Interconnect Structure
Minimizing Shorting Between Finfet Epitaxial Regions
Methods and Structure to Form High K Metal Gate Stack with Single Work-Function Metal
Selective Gas Etching for Self-Aligned Pattern Transfer
Sram Design to Facilitate Single Fin Cut in Double Sidewall Image Transfer Process
Nanosheet Field Effect Transistors with Partial Inside Spacers
Copper Interconnect Structure with Manganese Oxide Barrier Layer
Finfet Devices
Alternating Hardmasks for Tight-Pitch Line Formation
Advanced Copper Interconnects with Hybrid Microstructure
Forming Self-Aligned Vias and Air-Gaps in Semiconductor Fabrication
Patent:
9,911,652 →
Application:
15/472,745 →
Minimizing Shorting Between Finfet Epitaxial Regions
Nanosheet Field Effect Transistors with Partial Inside Spacers
Alternating Hardmasks for Tight-Pitch Line Formation
Finfet Devices
Nanosheet Transistor
Patent:
10,243,061 →
Application:
15/814,376 →
Forming Self-Aligned Vias and Air-Gaps in Semiconductor Fabrication
Copper Interconnect Structure with Manganese Oxide Barrier Layer
Copper Interconnect Structure with Manganese Oxide Barrier Layer
Finfet Devices
Selective Ild Deposition for Fully Aligned via with Airgap
Two-Color Self-Aligned Double Patterning (Sadp) to Yield Static Random Access Memory (Sram) and Dense Logic
Forming Nanosheet Transistor Using Sacrificial Spacer and Inner Spacers
Semiconductor Device with Reduced via Resistance
Minimizing Shorting Between Finfet Epitaxial Regions
Selective Gas Etching for Self-Aligned Pattern Transfer
Advanced Copper Interconnects with Hybrid Microstructure
Finfet Devices
Finfet Devices
Interconnect Structure
Self-Forming Barrier for Use in Air Gap Formation
Nanosheet Transistor
Forming Self-Aligned Vias and Air-Gaps in Semiconductor Fabrication
Middle-Of-Line (Mol) Capacitance Reduction for Self-Aligned Contact in Gate Stack
Finfet Devices
Minimizing Shorting Between Finfet Epitaxial Regions
Forming Nanosheet Transistor Using Sacrificial Spacer and Inner Spacers
Semiconductor Structures Including Middle-of-Line (Mol) Capacitance Reduction for Self-Aligned Contact in Gate Stack
Selective Ild Deposition for Fully Aligned via with Airgap
High K Metal Gate Stack with Single Work-Function Metal
Application:
16/454,178 →
Publication:
US 2019/0318966
Alternating Hardmasks for Tight-Pitch Line Formation
Interconnect Structure
Selective Gas Etching for Self-Aligned Pattern Transfer
Nanosheet Field Effect Transistors with Partial Inside Spacers
Semiconductor Device with Reduced via Resistance
Semiconductor Device with Reduced via Resistance
Two-Color Self-Aligned Double Patterning (Sadp) to Yield Static Random Access Memory (Sram) and Dense Logic
Advanced Copper Interconnects with Hybrid Microstructure
Selective Ild Deposition for Fully Aligned via with Airgap
Finfet Devices
Nanosheet Transistor
Self-Forming Barrier for Use in Air Gap Formation
Copper Interconnect Structure with Manganese Barrier Layer
Minimizing Shorting Between Finfet Epitaxial Regions
Selective Gas Etching for Self-Aligned Pattern Transfer
Forming Self-Aligned Vias and Air-Gaps in Semiconductor Fabrication
Semiconductor Device with Reduced via Resistance
Semiconductor Structures Including Middle-of-Line (Mol) Capacitance Reduction for Self-Aligned Contact in Gate Stack
Selective Ild Deposition for Fully Aligned via with Airgap
Alternating Hardmasks for Tight-Pitch Line Formation
Two-Color Self-Aligned Double Patterning (Sadp) to Yield Static Random Access Memory (Sram) and Dense Logic
Forming Nanosheet Transistor Using Sacrificial Spacer and Inner Spacers
Finfet Devices
Advanced Copper Interconnects with Hybrid Microstructure
Method of Forming Copper Interconnect Structure with Manganese Barrier Layer
Selective Gas Etching for Self-Aligned Pattern Transfer
Method of Forming Nanosheet Field Effect Transistors with Partial Inside Spacers
Application:
17/726,766 →
Publication:
US 2022/0320316
Forming Self-Aligned Vias and Air-Gaps in Semiconductor Fabrication
Semiconductor Structures Including Middle-of-Line (Mol) Capacitance Reduction for Self-Aligned Contact in Gate Stack
Self-Forming Barrier for Use in Air Gap Formation
Alternating Hardmasks for Tight-Pitch Line Formation
Finfet Devices
Minimizing Shorting Between Finfet Epitaxial Regions
Selective Ild Deposition for Fully Aligned via with Airgap
Forming Nanosheet Transistor Using Sacrificial Spacer and Inner Spacers
Two-Color Self-Aligned Double Patterning (Sadp) to Yield Static Random Access Memory (Sram) and Dense Logic
Related Assignments
(22)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Aug 22, 2014
From: EDELSTEIN, DANIEL C.; NGUYEN, SON V.; NOGAMI, TAKESHI; PRIYADARSHINI, DEEPIKA
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 033594/0456 →
Assignment of Assignor's Interest
Jan 27, 2015
From: MOHAMMED, ILYAS; HABA, BELGACEM; UZOH, CYPRIAN; SAVALIA, PIYUSH
To: TESSERA, INC.
Reel/Frame 034825/0370 →
Assignment of Assignor's Interest
Apr 7, 2015
From: CHENG, KANGGUO; PRANATHARTHIHARAN, BALASUBRAMANIAN; REZNICEK, ALEXANDER; SURISETTY, CHARAN V.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 035344/0341 →
Assignment of Assignor's Interest
Jun 25, 2015
From: BASKER, VEERARAGHAVAN S.; CHENG, KANGGUO; STANDAERT, THEODORUS E.; WANG, JUNLI
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 035907/0494 →
Assignment of Assignor's Interest
Oct 14, 2015
From: EDELSTEIN, DANIEL C.; NGUYEN, SON V.; NOGAMI, TAKESHI; PRIYADARSHINI, DEEPIKA
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 036793/0890 →
Assignment of Assignor's Interest
Oct 27, 2015
From: MOHAMMED, ILYAS; HABA, BELGACEM; UZOH, CYPRIAN; SAVALIA, PIYUSH
To: TESSERA RESEARCH LLC
Reel/Frame 036892/0126 →
Assignment of Assignor's Interest
Oct 28, 2015
From: TESSERA RESEARCH LLC
To: TESSERA, INC.
Reel/Frame 036903/0177 →
Assignment of Assignor's Interest
Nov 17, 2015
From: MOHAMMED, ILYAS; HABA, BELGACEM; UZOH, CYPRIAN; SAVALIA, PIYUSH
To: TESSERA, INC.
Reel/Frame 037061/0420 →
Assignment of Assignor's Interest
Nov 24, 2015
From: OK, INJO; PRANATHARTHIHARAN, BALASUBRAMANIAN; SEO, SOON-CHEON; SURISETTY, CHARAN V.V.S.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 037136/0608 →
Assignment of Assignor's Interest
Nov 25, 2015
From: EDELSTEIN, DANIEL C.; YANG, CHIH-CHAO
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 037141/0033 →
Assignment of Assignor's Interest
Jan 5, 2016
From: WEYBRIGHT, MARY E.; WONG, ROBERT C.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 037409/0288 →
Assignment of Assignor's Interest
Mar 15, 2016
From: MURRAY, CONAL E.; YANG, CHIH-CHAO
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 037982/0799 →
Assignment of Assignor's Interest
Mar 23, 2016
From: MURRAY, CONAL E.; YANG, CHIH-CHAO
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 038079/0159 →
Security Interest
Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
Assignment of Assignor's Interest
Jan 6, 2020
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: TESSERA, INC.
Reel/Frame 051489/0557 →
Security Interest
Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
Release of Security Interest
Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION
Reel/Frame 052920/0001 →
Certificate of Conversion & Change of Name
Jun 27, 2022
From: TESSERA, INC.
To: TESSERA LLC
Reel/Frame 060443/0792 →
Certificate of Conversion & Change of Name
Jul 11, 2022
From: TESSERA, INC.
To: TESSERA LLC
Reel/Frame 060940/0552 →
Certificate of Conversion & Change of Name
Sep 7, 2022
From: TESSERA, INC.
To: TESSERA LLC
Reel/Frame 061388/0199 →
Certificate of Conversion & Change of Name
Sep 21, 2022
From: TESSERA, INC.
To: TESSERA LLC
Reel/Frame 061502/0154 →
Certificate of Conversion & Change of Name
Oct 7, 2022
From: TESSERA, INC.
To: TESSERA LLC
Reel/Frame 061623/0936 →