FinFET devices

1. A method comprising:

forming a first set of trenches in a semiconductor material;

filling the first set of trenches with insulator material;

forming a second set of trenches in the semiconductor material, alternating with the first set of trenches that are filled, the second set of trenches forming semiconductor structures which have a dimension of fin structures;

filling the second set of trenches with insulator material;

recessing the insulator material within the first set of trenches and the second set of trenches to form the fin structures; and

providing a doped epitaxial growth at a bottom of the first set of trenches.

2. The method of claim 1 , wherein the first set of trenches are lined with a liner material, prior to the filling with the insulator material.

3. The method of claim 2 , wherein the second set of trenches are lined with a liner material, prior to the filling with the insulator material.

4. The method of claim 1 , further comprising providing a doped epitaxial growth at a bottom of the second set of trenches.

5. The method of claim 4 , wherein the doped epitaxial growth at the bottom of the second set of trenches is provided on another side of a device with respect to the doped epitaxial growth at the bottom of the first set of trenches.

6. The method of claim 5 , wherein the doped epitaxial growth at the bottom of the second set of trenches is different than the doped epitaxial growth at the bottom of the first set of trenches.

7. The method of claim 1 , wherein the insulator material in the first set of trenches and the second set of trenches is oxide material.

8. The method of claim 1 , wherein the filling of the first set of trenches and the second set of trenches includes a flowable oxide followed by an anneal process.

9. The method of claim 1 , wherein:

forming the first set of trenches comprises:

forming a plurality of mandrels on an insulator layer;

forming sidewall spacers on the plurality of mandrels;

removing the plurality of mandrels, leaving a space between the sidewall spacers; and

etching into the semiconductor material within the space between the sidewall spacers; and

forming the second set of trenches comprises:

removing the sidewall spacers;

forming inner sidewall spacers on upper portions of the insulator material that filled the first set of trenches;

etching into the semiconductor material within spaces between adjacent ones of the inner sidewall spacers.

10. A method, comprising:

forming trenches in semiconductor material;

filling the trenches with insulator material; and

forming additional trenches in the semiconductor material to form gate structures, anchored by the filled trenches,

wherein the trenches are filled with a liner and the insulator material and the additional trenches are filled with a second liner and the insulator material.

11. The method of claim 10 , further comprising providing a doped epitaxial growth at a bottom of the trenches.

12. The method of claim 10 , wherein the liner and the second liner are of different materials.

13. The method of claim 10 , further comprising epitaxially growing material which is doped on both sides of a device formed over the fin structures.

14. The method of claim 10 , wherein the material is different on one side than another side.

15. A method, comprising:

forming trenches in semiconductor material;

filling the trenches with insulator material;

forming additional trenches in the semiconductor material to form gate structures, anchored by the filled trenches; and

providing a doped epitaxial growth at a bottom of the trenches.