IP Library Patent Application 17688611
Patent Application
App. No. 17/688,611

SHARED DATA BUFFER FOR PREFETCH AND NON-PREFETCH ENTRIES

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Quick Facts
Patent No.
US None
App. No.
17/688,611
Abstract

An embodiment of an apparatus may comprise one or more substrates and a controller coupled to the one or more substrates, the controller including a read data buffer, a content-addressable memory, and circuitry to track both prefetch read requests and non-prefetch read requests for a memory with the content-addressable memory and to store both prefetch entries and non-prefetch entries in the read data buffer. Other embodiments are disclosed and claimed.

Claims (49)

1 . An electronic apparatus, comprising:

one or more substrates; and

a controller coupled to the one or more substrates, the controller including:

a read data buffer,

a content-addressable memory, and

circuitry to track both prefetch read requests and non-prefetch read requests for a memory with the content-addressable memory and to store both prefetch entries and non-prefetch entries in the read data buffer.

2 . The apparatus of claim 1 , wherein the circuitry is further to:

allocate prefetch entries in the read data buffer based on a bandwidth of a workload.

3 . The apparatus of claim 2 , wherein the circuitry is further to:

hold prefetch entries in the read data buffer as long as a bandwidth of the workload is determined to not exceed a bandwidth threshold and an amount of free space for the read data buffer is determined to exceed a space threshold for buffer space for non-prefetch entries.

4 . The apparatus of claim 2 , wherein the circuitry is further to:

determine the bandwidth of the workload based on a first threshold for an occupancy of the read data buffer and a second threshold for outstanding memory requests.

5 . The apparatus of claim 2 , wherein the circuitry is further to:

deallocate prefetch entries from the read data buffer if the bandwidth of the workload is determined to exceed a bandwidth threshold.

6 . The apparatus of claim 5 , wherein the circuitry is further to:

deallocate prefetch entries from the read data buffer a predetermined amount of time after the bandwidth of the workload is determined to exceed the bandwidth threshold.

7 . An electronic system, comprising:

memory; and

a controller communicatively coupled to the memory, the controller including a buffer and circuitry to:

track both prefetch read requests and non-prefetch read requests for the memory, and

store both prefetch entries and non-prefetch entries in the buffer.

8 . The system of claim 7 , wherein the circuitry is further to:

allocate prefetch entries in the buffer based on a bandwidth of a workload.

9 . The system of claim 8 , wherein the circuitry is further to:

hold prefetch entries in the buffer as long as a bandwidth of the workload is determined to not exceed a bandwidth threshold and an amount of free space for the buffer is determined to exceed a space threshold for buffer space for non-prefetch entries.

10 . The system of claim 8 , wherein the circuitry is further to:

determine the bandwidth of the workload based on a first threshold for an occupancy of the buffer and a second threshold for outstanding memory requests.

11 . The system of claim 8 , wherein the circuitry is further to:

deallocate prefetch entries from the buffer if the bandwidth of the workload is determined to exceed a bandwidth threshold.

12 . The system of claim 11 , wherein the circuitry is further to:

deallocate prefetch entries from the buffer a predetermined amount of time after the bandwidth of the workload is determined to exceed the bandwidth threshold.

13 . The system of claim 7 , wherein the circuitry is further to:

store both prefetch request tracker entries and non-prefetch request tracker entries in a content-addressable memory.

14 . A method, comprising:

controlling access to a memory;

tracking both prefetch read requests and non-prefetch read requests for the memory; and

storing both prefetch entries and non-prefetch entries in a read data buffer.

15 . The method of claim 14 , further comprising:

allocating prefetch entries in the read data buffer based on a bandwidth of a workload.

16 . The method of claim 15 , further comprising:

holding prefetch entries in the read data buffer as long as a bandwidth of the workload is determined to not exceed a bandwidth threshold and an amount of free space for the read data buffer is determined to exceed a space threshold for buffer space for non-prefetch entries.

17 . The method of claim 15 , further comprising:

determining the bandwidth of the workload based on a first threshold for an occupancy of the read data buffer and a second threshold for outstanding memory requests.

18 . The method of claim 15 , further comprising:

deallocating prefetch entries from the read data buffer if the bandwidth of the workload is determined to exceed a bandwidth threshold.

19 . The method of claim 18 , further comprising:

deallocating prefetch entries from the read data buffer a predetermined amount of time after the bandwidth of the workload is determined to exceed the bandwidth threshold.

20 . The method of claim 14 , further comprising:

storing both prefetch request tracker entries and non-prefetch request tracker entries in a content-addressable memory.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072549/0289 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2022
From: SINGH, NISHANT; VENKATESWARAN, SHARADA; LIU, DANIEL
To: INTEL CORPORATION
Reel/Frame 059189/0135 →