Low-swing Schmitt triggers
Systems and methods are disclosed for low-swing Schmitt triggers. For example, an apparatus includes a Schmitt trigger including an input node, an output node, and a feedback node that is configured to bear a feedback voltage level that is a sum of an input voltage level at the input node and an attenuated voltage level of the output node; a current source connected to the output node; a voltage sensor connected to the feedback node and configured to cause the current source to pull up an output voltage level at the output node responsive to the feedback voltage level crossing a threshold.
1. An apparatus comprising:
a Schmitt trigger including an input node, an output node, and a feedback node that is configured to bear a feedback voltage level that is a sum of an input voltage level at the input node and an attenuated voltage level of the output node;
a current source directly connected to the output node; and
a voltage sensor directly connected to the feedback node and configured to cause the current source to pull up an output voltage level at the output node responsive to the feedback voltage level crossing a threshold.
2. The apparatus of claim 1 , wherein the feedback node is a first feedback node, the feedback voltage is a first feedback voltage, the voltage sensor is a first voltage sensor, the threshold is a first threshold, and the Schmitt trigger includes a second feedback node that is configured to bear a second feedback voltage level that is a sum of the input voltage level and an attenuated voltage level of the output node, comprising:
a current sink connected to the output node; and
a second voltage sensor connected to the second feedback node and configured to cause the current sink to pull down the output voltage level at the output node responsive to the second feedback voltage level crossing a second threshold.
3. The apparatus of claim 2 , in which the current sink includes an NMOS transistor with a gate connected to an output of the second voltage sensor.
4. The apparatus of claim 2 , in which the current sink includes a parallel pull-down transistor.
5. The apparatus of claim 2 , in which the second voltage sensor includes a CMOS threshold voltage sensor.
6. The apparatus of claim 1 , in which the current source includes a PMOS transistor with a gate connected to an output of the voltage sensor.
7. The apparatus of claim 1 , in which the current source includes a parallel pull-up transistor.
8. The apparatus of claim 1 , in which the voltage sensor includes a CMOS threshold voltage sensor.
9. The apparatus of claim 1 , in which the Schmitt trigger is a CMOS inverting Schmitt trigger.
10. The apparatus of claim 1 , in which the Schmitt trigger is a non-inverting Schmitt trigger.
11. A method comprising:
sensing when a feedback voltage of a Schmitt trigger crosses a threshold, wherein the feedback voltage is a sum of an input voltage level at an input node of the Schmitt trigger and an attenuated voltage level of an output node of the Schmitt trigger; and
responsive to the feedback voltage crossing the threshold, activating a current source to provide an additional path for current to flow concurrently to an output node of the Schmitt trigger, wherein the additional path for current to flow concurrently to the output node is in addition to a path for current through the Schmitt trigger to the output node.
12. The method of claim 11 , wherein the feedback voltage is a first feedback voltage, the threshold is a first threshold, and comprising:
sensing when a second feedback voltage of a Schmitt trigger crosses a second threshold, wherein the second feedback voltage is a sum of the input voltage level at the input node of the Schmitt trigger and an attenuated voltage level of the output node of the Schmitt trigger; and
responsive to the second feedback voltage crossing the second threshold, activating a current sink to provide an additional path for current to flow from the output node of the Schmitt trigger, wherein the additional path for current to flow from the output node is in addition to a path for current through the Schmitt trigger to the output node.
13. The method of claim 12 , in which the current sink includes a parallel pull-down transistor.
14. The method of claim 11 , in which the current source includes a parallel pull-up transistor.
15. The method of claim 11 , in which the Schmitt trigger is a CMOS inverting Schmitt trigger.
16. The method of claim 11 , in which the Schmitt trigger is a non-inverting Schmitt trigger.
17. An apparatus comprising:
a Schmitt trigger including an input node, an output node, and a feedback node that is configured to bear a feedback voltage level that is a sum of an input voltage level at the input node and an attenuated voltage level of the output node;
a current sink directly connected to the output node; and
a voltage sensor directly connected to the feedback node and configured to cause the current sink to pull down an output voltage level at the output node responsive to the feedback voltage level crossing a threshold.
18. The apparatus of claim 17 , in which the current sink includes an NMOS transistor with a gate connected to an output of the voltage sensor.
19. The apparatus of claim 17 , in which the current sink includes a parallel pull-down transistor.
20. The apparatus of claim 17 , in which the voltage sensor includes a CMOS threshold voltage sensor.