Multi-gate devices and fabricating the same with etch rate modulation
The present disclosure provides a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes channel members disposed over a substrate, a gate structure engaging the channel members, and an epitaxial feature adjacent the channel members. At least one of the channel members has an end portion in physical contact with an outer portion of the epitaxial feature. The end portion of the at least one of the channel members includes a first dopant of a first concentration. The outer portion of the epitaxial feature includes a second dopant of a second concentration. The first concentration is higher than the second concentration.
1. A semiconductor device, comprising:
channel members disposed over a substrate;
a gate structure engaging the channel members; and
an epitaxial feature adjacent the channel members,
wherein:
at least one of the channel members has an end portion in physical contact with an outer portion of the epitaxial feature,
the end portion of the at least one of the channel members includes a first dopant of a first concentration,
the outer portion of the epitaxial feature includes a second dopant of a second concentration, and
the first concentration is higher than the second concentration.
2. The semiconductor device of claim 1 , wherein the first dopant and the second dopant are a same dopant.
3. The semiconductor device of claim 2 , wherein the same dopant is selected from the group consisting of As, B, and P.
4. The semiconductor device of claim 1 , wherein the first dopant and the second dopant are different dopants.
5. The semiconductor device of claim 4 , wherein the first dopant has a first conductivity type, and wherein the second dopant has a second conductivity type that is opposite to the first conductivity type.
6. The semiconductor device of claim 1 , wherein the epitaxial feature has an inner portion, the inner portion of the epitaxial feature includes the second dopant of a third concentration that is higher than the second concentration.
7. The semiconductor device of claim 6 , wherein the first concentration is higher than the third concentration.
8. The semiconductor device of claim 6 , wherein the first concentration is lower than the third concentration.
9. The semiconductor device of claim 1 , wherein a center portion of the at least one of the channel members is substantially free of the first dopant.
10. The semiconductor device of claim 1 , wherein the at least one of the channel members is above a bottommost channel member, wherein the bottommost channel member has an end portion in physical contact with the outer portion of the epitaxial feature, and wherein the end portion of the bottommost channel member is substantially free of the first dopant.
11. The semiconductor device of claim 1 , wherein the at least one of the channel members is below a topmost channel member, wherein the topmost channel member has an end portion in physical contact with the outer portion of the epitaxial feature, and
wherein the end portion of the topmost channel member is substantially free of the first dopant.
12. A semiconductor device, comprising:
channel members vertically stacked above a substrate;
a gate structure wrapping each of the channel members;
an epitaxial feature in physical contact with end portions of the channel members and a top portion of the substrate; and
a dielectric feature interposing the gate structure and the epitaxial feature, wherein the end portion of at least one of the channel members includes a first dopant, wherein a concentration of the first dopant in the end portion of the at least one of the channel members is higher than a center portion of the at least one of the channel members, wherein the at least one of the channel members has a length smaller than adjacent channel members, and wherein the top portion of the substrate is free of the first dopant.
13. The semiconductor device of claim 12 , wherein the epitaxial feature includes a second dopant that is different from the first dopant.
14. The semiconductor device of claim 12 , wherein the dielectric feature is substantially free of the first dopant.
15. The semiconductor device of claim 12 , further comprising:
a dielectric layer disposed on sidewalls of the gate structure, wherein the dielectric layer has a surface portion that includes the first dopant.
16. The semiconductor device of claim 12 , wherein the end portion of the at least one of the channel members includes a (111) facet intersecting the dielectric feature.
17. A multi-gate semiconductor device, comprising:
a channel layer disposed over a substrate;
a gate structure engaging the channel layer, wherein the gate structure wraps around the channel layer;
a gate spacer disposed on sidewalls of the gate structure;
a source/drain (S/D) epitaxial feature abutting an end portion of the channel layer; and
an inner spacer interposing the gate structure and the S/D epitaxial feature,
wherein the end portion of the channel layer includes a dopant, and wherein a center portion of the channel layer and the S/D epitaxial feature are free of the dopant.
18. The multi-gate semiconductor device of claim 17 , wherein the gate spacer includes the dopant, and wherein the inner spacer is substantially free of the dopant.
19. The multi-gate semiconductor device of claim 17 , wherein a top portion of the substrate directly under the S/D epitaxial feature includes the dopant.
20. The multi-gate semiconductor device of claim 17 , wherein the dopant is a first dopant of a first conductivity type, and wherein the S/D epitaxial feature includes a second dopant of a second conductivity type that is opposite to the first conductivity type.