IP Library › Granted Patent US 12,581,727
Granted Patent B2
US 12,581,727 · App. 17/703,631 · Granted Mar 17, 2026

Electronic circuit and semiconductor module

Inventor: Keiji Okumura (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
H10D84/811H02M1/0051H02M7/003H02M7/5387H10D8/60
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Quick Facts
Patent No.
US 12,581,727
App. No.
17/703,631
Granted
Mar 17, 2026
Kind
B2
Abstract

An electronic circuit having a first terminal and a second terminal. The electronic circuit includes a first diode having a PN junction where a forward voltage is a first voltage, a second diode having a Schottky junction where the forward voltage is a second voltage that is smaller than the first voltage, a first wiring member coupling the first terminal to the second terminal via the first diode, and a second wiring member coupling the first terminal to the second terminal via the second diode. The second wiring member has an inductance larger than an inductance of the first wiring member.

Claims (37)

1 . An electronic circuit having a first terminal and a second terminal, the electronic circuit comprising:

a first diode having a PN junction where a forward voltage is a first voltage;

a second diode having a Schottky junction where the forward voltage is a second voltage that is smaller than the first voltage;

a first wiring member coupling the first terminal to the second terminal via the first diode; and

a second wiring member coupling the first terminal to the second terminal via the second diode, the second wiring member having an inductance larger than an inductance of the first wiring member, wherein the first diode, the second diode, the first wiring member and the second wiring member are configured to satisfy a condition of (L 2 −LI)>(Vf 1 −Vf 2 )×(1/(dl/dt)), wherein

L 2 is the inductance of the second wiring member,

LI is the inductance of the first wiring member,

Vf 1 is the first voltage, Vf 2 is the second voltage, and

I is a current flowing from the first terminal to the second terminal through the first wiring member, or flowing from the first terminal to the second terminal through the second wiring member, wherein a difference between the inductance of the second wiring member and the inductance of the first wiring member is larger than 0.18 nH.

2 . The electronic circuit according to claim 1 , further comprising a switching device, such that the first diode is a parasitic diode of the switching device.

3 . The electronic circuit according to claim 2 , wherein each of the switching device and the second diode is a device using a wide bandgap semiconductor.

4 . The electronic circuit according to claim 2 , wherein the second diode is coupled in anti-parallel with the switching device.

5 . A semiconductor module comprising the electronic circuit according to claim 1 .

6 . The semiconductor module according to claim 5 , wherein

the first wiring member includes a first wire provided between the first terminal and the first diode, and

the second wiring member includes a second wire provided between the first terminal and the second diode, the second wire having an inductance larger than an inductance of the first wire.

7 . The semiconductor module according to claim 6 , wherein the second wire is longer than the first wire.

8 . The semiconductor module according to claim 6 , wherein the second wire has a cross-sectional area smaller than a cross-sectional area of the first wire.

9 . The semiconductor module according to claim 6 , wherein the second wire has a curvature larger than a curvature of the first wire.

10 . The semiconductor module according to claim 7 , wherein the first diode is provided between the first terminal and the second diode.

11 . The semiconductor module according to claim 10 , wherein the second wire includes the first wire.

12 . The semiconductor module according to claim 6 , wherein

the first wiring member includes a first wiring pattern provided between the second terminal and the first diode, and

the second wiring member includes a second wiring pattern provided between the second terminal and the second diode, the second wiring pattern having an inductance larger than an inductance of the first wiring pattern.

13 . The semiconductor module according to claim 12 , wherein the second wiring pattern is longer than the first wiring pattern.

14 . The semiconductor module according to claim 12 , wherein the second wiring pattern is thinner than the first wiring pattern.

15 . The semiconductor module according to claim 12 , wherein the second wiring pattern has a width smaller than a width of the first wiring pattern.

16 . The semiconductor module according to claim 13 , further comprising:

a first conductive pattern having

the first and second diodes mounted thereto on a front surface thereof, and

the second terminal mounted thereto, wherein

the first wiring pattern is determined by a distance from a position at which the first diode is mounted to the first conductive pattern to the second terminal, and

the second wiring pattern is determined by a distance from a position at which the second diode is mounted to the first conductive pattern to the second terminal.

17 . The semiconductor module according to claim 16 , further comprising:

a switching device including the first diode, the switching device having a control electrode by which the switching device is controlled;

a second conductive pattern coupled to the first terminal; and

a third conductive pattern coupled to the control electrode of the switching device, wherein the first conductive pattern is provided between the second and third conductive patterns.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2022
From: OKUMURA, KEIJI
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 059393/0562 →
Priority Claims (1)
JP 2020-075679 · Apr 21, 2020 · national
Continuity (2)
Continuation PCTJP2021006597 · Feb 22, 2021
Related Publication 20220216199A1 · Jul 7, 2022
References Cited (26)
US 20030137320A1 · Grundl et al. · 2003 [cited by applicant]
US 20090206812A1 · Sasaya et al. · 2009 [cited by applicant]
US 20110062491A1 · Nakata · 2011 [cited by applicant]
US 20130082284A1 · Okumura · 2013 [cited by applicant]
US 20140001481A1 · Michikoshi · 2014 [cited by examiner]
US 20140264376A1 · Lutz et al. · 2014 [cited by applicant]
US 20150023081A1 · Obiraki et al. · 2015 [cited by applicant]
US 20150223339A1 · Nakamura et al. · 2015 [cited by applicant]
US 20170213806A1 · Nishimura · 2017 [cited by applicant]
US 20190103866A1 · Sakai · 2019 [cited by examiner]
US 20190273489A1 · Takano · 2019 [cited by examiner]
US 20200185359A1 · Nakashima et al. · 2020 [cited by applicant]
US 20210320045A1 · Hwang · 2021 [cited by examiner]
CN 102067309A · 2011 [cited by applicant]
CN 104134663A · 2014 [cited by applicant]
CN 104919589A · 2015 [cited by applicant]
JP 2003536363A · 2003 [cited by applicant]
JP 2009195054A · 2009 [cited by applicant]
JP 2011250589A · 2011 [cited by applicant]
JP 2014225706A · 2014 [cited by applicant]
JP 2017130621A · 2017 [cited by applicant]
JP 2020009834A · 2020 [cited by applicant]
WO 2019044748A1 · 2019 [cited by applicant]
Japanese Office Action dated Sep. 17, 2024, in the counterpart Japanese Patent Application No. 2023-148732. [cited by applicant]
International Search Report for PCT/JP2021/006597, mailed on Apr. 27, 2021. [cited by applicant]
Office Action issued for corresponding Chinese patent application No. 202180005459.9 on Jan. 24, 2026. [cited by applicant]