Radio frequency switch biasing topologies
A switching circuit comprises a first series switch coupled to a first output port, the first series switch including a first field-effect transistor (FET), a second FET, a third FET, a fourth FET, a fifth FET, and a sixth FET, a second series switch coupled to a second output port, and coupling circuitry configured to couple a gate of the fifth FET and a gate of the sixth FET to a first node, a source of the fifth FET and a drain of the sixth FET to a second node, a source of the first FET and a drain of the second FET to a third node, a gate of the first FET and a drain of the fifth FET to a fourth node, a gate of the second FET and a source of the sixth FET to a fifth node, the fourth node and the fifth node to a first gate voltage, and the first node to a second gate voltage that is different than the first gate voltage.
1. A switching circuit comprising:
a first series switch coupled to a first output port, the first series switch including a first field-effect transistor (FET), a second FET, a third FET, a fourth FET, a fifth FET, and a sixth FET; and
a second series switch coupled to a second output port;
a gate of the fifth FET being directly coupled to a gate of the sixth FET at a first node, a source of the fifth FET being coupled to a drain of the sixth FET at a second node, a source of the first FET being coupled to a drain of the second FET at a third node, a gate of the first FET being coupled to a drain of the fifth FET at a fourth node, a gate of the second FET being coupled to a source of the sixth FET at a fifth node, the fourth node and the fifth node being coupled to a first gate voltage, and the first node being coupled to a second gate voltage that is different than the first gate voltage.
2. The switching circuit of claim 1 further comprising a first shunt switch, wherein the first output port is coupled between the first series switch and the first shunt switch.
3. The switching circuit of claim 2 further comprising a second shunt switch, wherein the second output port is coupled between the second series switch and the second shunt switch.
4. The switching circuit of claim 3 wherein the first shunt switch comprises four series-connected FETs.
5. The switching circuit of claim 3 wherein the second shunt switch comprises four series-connected FETs.
6. The switching circuit of claim 1 wherein the second series switch comprises four series-connected FETs.
7. The switching circuit of claim 1 wherein the first series switch further comprises a seventh FET and an eighth FET.
8. The switching circuit of claim 1 wherein the first gate voltage is configured to be approximately 0 V while the second gate voltage is positive.
9. The switching circuit of claim 1 wherein the second gate voltage is configured to be approximately 0 V while the first gate voltage is positive.
10. A wireless device comprising:
a first series switch coupled to a first output port, the first series switch including a first field-effect transistor (FET), a second FET, a third FET, a fourth FET, a fifth FET, and a sixth FET; and
a second series switch coupled to a second output port;
the fifth FET being coupled to the first FET, a gate of the fifth FET being directly coupled to a gate of the sixth FET, the first FET being coupled to the second FET, the first FET and the second FET being coupled to a first gate voltage, and the fifth FET and the sixth FET being coupled to a second gate voltage that is different than the first gate voltage.
11. The wireless device of claim 10 further comprising a first shunt switch, wherein the first output port is coupled between the first series switch and the first shunt switch.
12. The wireless device of claim 11 further comprising a second shunt switch, wherein the second output port is coupled between the second series switch and the second shunt switch.
13. The wireless device of claim 12 wherein the first shunt switch comprises four series-connected FETs.
14. The wireless device of claim 12 wherein the second shunt switch comprises four series-connected FETs.
15. The wireless device of claim 10 wherein the second series switch comprises four series-connected FETs.
16. A semiconductor die comprising:
a first series switch coupled to a first output port, the first series switch including a first field-effect transistor (FET), a second FET, a third FET, a fourth FET, a fifth FET, and a sixth FET; and
a second series switch coupled to a second output port;
the fifth FET being coupled to the first FET, a gate of the fifth FET being coupled to a gate of the sixth FET, the first FET being coupled to the second FET, the first FET and the second FET being coupled to a first gate voltage, and the fifth FET and the sixth FET being coupled to a second gate voltage that is different than the first gate voltage.
17. The semiconductor die of claim 16 further comprising a first shunt switch, wherein the first output port is coupled between the first series switch and the first shunt switch.
18. The semiconductor die of claim 17 further comprising a second shunt switch, wherein the second output port is coupled between the second series switch and the second shunt switch.
19. The semiconductor die of claim 18 wherein the first shunt switch comprises four series-connected FETs.
20. The semiconductor die of claim 18 wherein the second shunt switch comprises four series-connected FETs.