Circuitry and methods for implementing micro-context based trust domains
Systems, methods, and apparatuses for implementing micro-context based trust domains are described. In one example, a system includes a hardware processor core to implement a trust domain manager to manage one or more hardware isolated virtual machines as a respective trust domain with a region of protected memory, and assign a micro-context identification value, that is not readable by privileged system code that is to execute on the hardware processor core, to each granule of a plurality of granules of physical memory of the protected memory (e.g., where a granule is a proper subset of a page of memory relating to a single object in memory); and a memory management circuit coupled between the hardware processor core and the physical memory, wherein the memory management circuit is to prevent data in the protected memory having a first micro-context identification value from being accessed by code based on the code having a different micro-context identification value.
1. An apparatus comprising:
a hardware processor core to implement a trust domain manager to manage one or more hardware isolated virtual machines as a respective trust domain with a region of protected memory, and assign a micro-context identification value, that is not readable by privileged system code that is to execute on the hardware processor core, to each granule of a plurality of granules of physical memory of the protected memory; and
a memory management circuit coupled between the hardware processor core and the physical memory, wherein the memory management circuit is to prevent data in the protected memory having a first micro-context identification value from being accessed by code based on the code having a different micro-context identification value.
2. The apparatus of claim 1 , wherein the trust domain manager is to store each micro-context identification value in a data structure that includes a virtual address to physical address mapping for each granule of the plurality of granules of the physical memory of the protected memory.
3. The apparatus of claim 2 , wherein the memory management circuit is to prevent data in the protected memory having a first virtual address from being accessed by code having a different virtual address in its virtual address to physical address mapping in the data structure.
4. The apparatus of claim 2 , wherein the physical memory comprises a plurality of pages, and the data structure comprises a micro-context identification value for each granule of the plurality of granules of each page of the physical memory and a virtual address to physical address mapping for each page.
5. The apparatus of claim 1 , wherein the granule is less than a page of the physical memory.
6. The apparatus of claim 1 , wherein the privileged system code includes an operating system and a virtual machine monitor of the one or more hardware isolated virtual machines that are to execute on the hardware processor core.
7. The apparatus of claim 1 , wherein, in response to a request from the privileged system code to provide a function to a trust domain to execute, the trust domain manager is to store the function in the protected memory, and assign each granule of memory utilized to store the function a same micro-context identification value.
8. The apparatus of claim 1 , wherein, in response to a request from the privileged system code to store data into the protected memory, the trust domain manager is to overwrite any assigned micro-context identification values with a micro-context identification value for code that is currently executing.
9. A method comprising:
managing one or more hardware isolated virtual machines as a respective trust domain with a region of protected memory by a trust domain manager of a hardware processor core;
assigning a micro-context identification value, that is not readable by privileged system code that is executing on the hardware processor core, to each granule of a plurality of granules of physical memory of the protected memory by the trust domain manager of the hardware processor core;
allowing, by a memory management circuit coupled between the hardware processor core and the physical memory, a first memory access of data in the protected memory having a first micro-context identification value requested by a first code based on the first code having the first micro-context identification value; and
preventing, by the memory management circuit, a second memory access of the data in the protected memory having the first micro-context identification value requested by a second code based on the second code having a different micro-context identification value.
10. The method of claim 9 , further comprising storing, by the trust domain manager, each micro-context identification value in a data structure that includes a virtual address to physical address mapping for each granule of the plurality of granules of the physical memory of the protected memory.
11. The method of claim 10 , further comprising preventing, by the memory management circuit, data in the protected memory having a first virtual address from being accessed by code having a different virtual address in its virtual address to physical address mapping in the data structure.
12. The method of claim 10 , wherein the physical memory comprises a plurality of pages, and the data structure comprises a micro-context identification value for each granule of the plurality of granules of each page of the physical memory and a virtual address to physical address mapping for each page.
13. The method of claim 9 , wherein the granule is less than a page of the physical memory.
14. The method of claim 9 , wherein the privileged system code includes an operating system and a virtual machine monitor of the one or more hardware isolated virtual machines that are executing on the hardware processor core.
15. The method of claim 9 , further comprising, in response to a request from the privileged system code to provide a function to a trust domain to execute:
storing the function in the protected memory, and
assigning each granule of memory utilized to store the function a same micro-context identification value by the trust domain manager.
16. The method of claim 9 , further comprising, in response to a request from the privileged system code to store data into the protected memory:
overwriting, by the trust domain manager, any assigned micro-context identification values with a micro-context identification value for code that is currently executing.
17. An apparatus comprising:
a physical memory;
a hardware processor core to implement a trust domain manager to manage one or more hardware isolated virtual machines as a respective trust domain with a region of protected memory, and assign a micro-context identification value, that is not readable by privileged system code that is to execute on the hardware processor core, to each granule of a plurality of granules of the physical memory of the protected memory; and
a memory management circuit coupled between the hardware processor core and the physical memory, wherein the memory management circuit is to prevent data in the protected memory having a first micro-context identification value from being accessed by code based on the code having a different micro-context identification value.
18. The apparatus of claim 17 , wherein the trust domain manager is to store each micro-context identification value in a data structure that includes a virtual address to physical address mapping for each granule of the plurality of granules of the physical memory of the protected memory.
19. The apparatus of claim 18 , wherein the memory management circuit is to prevent data in the protected memory having a first virtual address from being accessed by code having a different virtual address in its virtual address to physical address mapping in the data structure.
20. The apparatus of claim 18 , wherein the physical memory comprises a plurality of pages, and the data structure comprises a micro-context identification value for each granule of the plurality of granules of each page of the physical memory and a virtual address to physical address mapping for each page.
21. The apparatus of claim 17 , wherein the granule is less than a page of the physical memory.
22. The apparatus of claim 17 , wherein the privileged system code includes an operating system and a virtual machine monitor of the one or more hardware isolated virtual machines that are to execute on the hardware processor core.
23. The apparatus of claim 17 , wherein, in response to a request from the privileged system code to provide a function to a trust domain to execute, the trust domain manager is to store the function in the protected memory, and assign each granule of memory utilized to store the function a same micro-context identification value.
24. The apparatus of claim 17 , wherein, in response to a request from the privileged system code to store data into the protected memory, the trust domain manager is to overwrite any assigned micro-context identification values with a micro-context identification value for code that is currently executing.