Joint polar encoding of multiple payloads with unequal error protection
The aspects described herein may enable an apparatus to jointly encode two or more payloads using a single polar encoder device, while providing unequal error protection for the payloads. The apparatus causes a polar encoder to polar encode a first payload and a second payload to generate a polar encoded codeword. The polar encoder is configured to encode one or more bits of the first payload at a first reliability level and encode one or more bits of the second payload at a second reliability level, where the one or more bits of the first payload are associated with a first priority level and the one or more bits of the second payload are associated with a second priority level. The apparatus transmits the polar encoded codeword.
1. An apparatus for wireless communication, comprising:
a memory; and
at least one processor coupled to the memory, wherein the at least one processor includes a polar encoder, and wherein the at least one processor is configured to:
obtain a first set of error detection bits for a first payload;
obtain a second set of error detection bits for a second payload;
cause the polar encoder to polar encode the first payload and the second payload to generate a polar encoded codeword based on the first set of error detection bits and the second set of error detection bits, wherein, to polar encode the first payload and the second payload to generate the polar encoded codeword, the polar encoder is configured to encode one or more bits of the first payload at a first reliability level and encode one or more bits of the second payload at a second reliability level, wherein the one or more bits of the first payload are associated with a first priority level and the one or more bits of the second payload are associated with a second priority level; and
transmit the polar encoded codeword.
2. The apparatus of claim 1 , wherein, to cause the polar encoder to polar encode the first payload and the second payload to generate the polar encoded codeword, the at least one processor is configured to:
map the one or more bits of the first payload to a first group of inputs of the polar encoder, wherein the first group of inputs is associated with the first reliability level; and
map the one or more bits of the second payload to a second group of inputs of the polar encoder, wherein the second group of inputs is associated with the second reliability level.
3. The apparatus of claim 2 , wherein the first priority level is higher than the second priority level, and wherein the first reliability level is higher than the second reliability level.
4. The apparatus of claim 3 , wherein any of the first group of inputs associated with the first reliability level provides higher transmission reliability than any of the second group of inputs associated with the second reliability level.
5. The apparatus of claim 2 , wherein the at least one processor is further configured to:
obtain the first set of error detection bits for the first payload if a first size of the first payload exceeds a first threshold or if a network configuration indicates that the first set of error detection bits are to be obtained;
obtain the second set of error detection bits for the second payload if a second size of the second payload exceeds a second threshold or if the network configuration indicates that the second set of error detection bits are to be obtained; and
obtain a third set of error detection bits for a third payload if a third size of the third payload exceeds a third threshold or if the network configuration indicates that the third set of error detection bits are to be obtained, wherein the third payload includes at least one of the first payload, the first set of error detection bits, the second payload, or the second set of error detection bits.
6. The apparatus of claim 5 , wherein the first set of error detection bits is associated with the first priority level, the second set of error detection bits is associated with the second priority level, and the third set of error detection bits is associated with a third priority level, wherein the at least one processor configured to polar encode the first payload and the second payload is further configured to:
map each of the first set of error detection bits to the first group of inputs of the polar encoder, wherein the first group of inputs is associated with the first reliability level;
map each of the second set of error detection bits to the second group of inputs of the polar encoder, wherein the second group of inputs is associated with the second reliability level; and
map each of the third set of error detection bits to a third group of inputs of the polar encoder, wherein the third group of inputs is associated with a third reliability level.
7. The apparatus of claim 6 , wherein the polar encoded codeword is based on at least one of the first set of error detection bits, the second set of error detection bits, or the third set of error detection bits.
8. The apparatus of claim 6 , wherein the first priority level is higher than the second and third priority levels, the third priority level is higher than the second priority level, the first reliability level is higher than the second and third reliability levels, and the third reliability level is higher than the second reliability level.
9. The apparatus of claim 8 , wherein:
any of the first group of inputs associated with the first reliability level provides higher transmission reliability than any of the second group of inputs associated with the second reliability level and any of the third group of inputs associated with the third reliability level, and
any of the third group of inputs associated with the third reliability level provides higher transmission reliability than any of the second group of inputs associated with the second reliability level.
10. The apparatus of claim 1 , wherein, to cause the polar encoder to polar encode the first payload and the second payload to generate the polar encoded codeword, the at least one processor is configured to:
map each respective error detection bit of the first set of error detection bits for the first payload to a first group of inputs of the polar encoder, wherein the first set of error detection bits is associated with the first priority level; and
map each respective error detection bit of the second set of error detection bits for the second payload to a second group of inputs of the polar encoder, wherein the second set of error detection bits is associated with the second priority level.
11. The apparatus of claim 10 , wherein:
the first set of error detection bits is obtained when a first number of bits in the first payload exceeds a threshold, and
the second set of error detection bits is obtained when a second number of bits in the second payload exceeds the threshold.
12. The apparatus of claim 10 , wherein, to cause the polar encoder to polar encode the first payload and the second payload to generate the polar encoded codeword, the at least one processor is configured to:
map each respective error detection bit of a third set of error detection bits for a third payload to a third group of inputs of the polar encoder, wherein the third payload includes the first payload, the first set of error detection bits, the second payload, and the second set of error detection bits, and wherein the third set of error detection bits is associated with a third priority level,
wherein the third group of inputs is associated with a third reliability level, and wherein the polar encoded codeword is based on the third set of error detection bits.
13. The apparatus of claim 12 , wherein the second set of error detection bits or the third set of error detection bits is obtained based on a configuration or signaling from a base station.
14. The apparatus of claim 12 , wherein the first priority level is higher than the second and third priority levels, wherein the third priority level is higher than the second priority level, wherein the first reliability level is higher than the second and third reliability levels, and wherein the third reliability level is higher than the second reliability level.
15. The apparatus of claim 12 , wherein:
any of the first group of inputs associated with the first reliability level provides higher transmission reliability than any of the second group of inputs associated with the second reliability level and any of the third group of inputs associated with the third reliability level, and
any of the third group of inputs associated with the third reliability level provides higher transmission reliability than any of the second group of inputs associated with the second reliability level.
16. The apparatus of claim 12 , wherein the third priority level is higher than the first and second priority levels, the first priority level is higher than the second priority level, the third reliability level is higher than the first and second reliability levels, and the first reliability level is higher than the second reliability level.
17. The apparatus of claim 16 , wherein:
any of the third group of inputs associated with the third reliability level provides higher transmission reliability than any of the first group of inputs associated with the first reliability level and any of the second group of inputs associated with the second reliability level, and
any of the first group of inputs associated with the first reliability level provides higher reliability than any of the second group of inputs associated with the second reliability level.
18. A method of wireless communication, comprising:
obtaining a first set of error detection bits for a first payload;
obtaining a second set of error detection bits for a second payload;
polar encoding the first payload and the second payload to generate a polar encoded codeword based on the first set of error detection bits and the second set of error detection bits, wherein one or more bits of the first payload are polar encoded at a first reliability level and one or more bits of the second payload are polar encoded at a second reliability level, and wherein the one or more bits of the first payload are associated with a first priority level and the one or more bits of the second payload are associated with a second priority level; and
transmitting the polar encoded codeword.
19. The method of claim 18 , further comprising:
mapping the one or more bits of the first payload to a first group of inputs of a polar encoder, wherein the first group of inputs is associated with the first reliability level; and
mapping the one or more bits of the second payload to a second group of inputs of the polar encoder, wherein the second group of inputs is associated with the second reliability level.
20. The method of claim 19 , wherein the first priority level is higher than the second priority level, and wherein the first reliability level is higher than the second reliability level.
21. The method of claim 20 , wherein any of the first group of inputs associated with the first reliability level provides higher transmission reliability than any of the second group of inputs associated with the second reliability level.
22. The method of claim 19 , further comprising:
obtaining the first set of error detection bits for the first payload if a first size of the first payload exceeds a first threshold or if a network configuration indicates that the first set of error detection bits are to be obtained;
obtaining the second set of error detection bits for the second payload if a second size of the second payload exceeds a second threshold or if the network configuration indicates that the second set of error detection bits are to be obtained; and
obtaining a third set of error detection bits for a third payload if a third size of the third payload exceeds a third threshold or if the network configuration indicates that the third set of error detection bits are to be obtained, wherein the third payload includes at least one of the first payload, the first set of error detection bits, the second payload, or the second set of error detection bits.
23. The method of claim 18 , further comprising:
mapping each respective error detection bit of the first set of error detection bits for the first payload to a first group of inputs of a polar encoder, wherein the first set of error detection bits is associated with the first priority level; and
mapping each respective error detection bit of the second set of error detection bits for the second payload to a second group of inputs of the polar encoder, wherein the second set of error detection bits is associated with the second priority level.
24. The method of claim 23 , wherein:
the first set of error detection bits is obtained when a first number of bits in the first payload exceeds a threshold, and
the second set of error detection bits is obtained when a second number of bits in the second payload exceeds the threshold.
25. The method of claim 23 , further comprising:
mapping each respective error detection bit of a third set of error detection bits for a third payload to a third group of inputs of the polar encoder, wherein the third payload includes the first payload, the first set of error detection bits, the second payload, and the second set of error detection bits, wherein the third set of error detection bits is associated with a third priority level,
wherein the third group of inputs is associated with a third reliability level, and wherein the polar encoded codeword is based on the third set of error detection bits.
26. An apparatus for wireless communication, comprising:
a memory; and
at least one processor coupled to the memory and configured to:
receive a wireless transmission including a codeword encoded using a polar code;
decode the codeword at a polar decoder to obtain a set of decoded bits; and
segment the set of decoded bits based on mapping information to obtain at least:
a first payload and a first set of error detection bits associated with the first payload, wherein the first payload and the first set of error detection bits are associated with a first priority level, and
a second payload and a second set of error detection bits associated with the second payload, wherein the second payload and the second set of error detection bits are associated with a second priority level.
27. The apparatus of claim 26 , wherein the at least one processor is further configured to:
perform a first error detection operation for the first payload using the first set of error detection bits; and
perform a second error detection operation for the second payload using the second set of error detection bits.