Sacrificial gate capping layer for gate protection during source/drain contact opening
A method including providing a substrate including metal gate stacks and source/drain contact regions in alternating arrangement along a surface of the substrate, each of the source/drain contact regions being recessed within a respective opening between adjacent metal gate stacks such that source/drain contact regions provide a bottom of the opening and adjacent metal gate stacks provide sidewalls, and a dielectric covering the substrate such that the dielectric fills each opening. The substrate is exposed to an initial plasma etch process to remove a first portion of the dielectric from each opening down to a first depth, and a sacrificial gate capping layer is formed on the substrate while leaving each of the openings uncovered. The substrate is exposed to another plasma etch process to remove the sacrificial gate capping layer while removing a second portion of the dielectric from each opening down to a second depth.
1 . A method comprising:
providing a substrate comprising a plurality of metal gate stacks and a plurality of source/drain contact regions in alternating arrangement along a surface of a base substrate structure, wherein each of the source/drain contact regions is recessed within a respective opening between adjacent metal gate stacks such that the source/drain contact region provides a bottom of the opening and the adjacent metal gate stacks provide sidewalls of the opening, and a dielectric covering the substrate such that the dielectric fills each opening;
exposing the substrate to an initial plasma etch process to remove a first portion of the dielectric from each opening down to a first depth in the opening which uncovers a portion of the sidewalls provided by the adjacent metal gate stacks;
forming a sacrificial gate capping layer on the substrate while leaving each of the openings uncovered by the sacrificial gate capping layer; and
exposing the substrate to another plasma etch process to remove the sacrificial gate capping layer while removing a second portion of the dielectric from each opening down to a second depth in the opening.
2 . The method of claim 1 , wherein the exposing the substrate to another plasma etch process comprises removing all of the dielectric from each of the openings to expose each of the source/drain contact regions.
3 . The method of claim 1 , wherein the exposing the substrate to another plasma etch process comprises removing the second portion to a second depth which does not remove all of the dielectric from each of the openings and does not expose each of the source/drain contact regions.
4 . The method of claim 3 , wherein the exposing the substrate to another plasma etch process comprises stopping the another plasma etch process before completely removing the sacrificial gate capping layer.
5 . The method of claim 4 , further comprising repeating the forming a sacrificial gate capping layer and the exposing the substrate to another plasma etch process until all of the dielectric is removed from each of the openings to expose the source/drain contact regions.
6 . The method of claim 1 , wherein the metal gate stacks include a conformal spacer layer formed as the sidewalls provided by the adjacent metal gate stacks.
7 . The method of claim 6 , wherein the initial plasma etch process exposes a portion of the conformal spacer layer that corresponds to the portion of the sidewalls.
8 . The method of claim 7 , wherein the forming a sacrificial gate capping layer comprises covering the exposed portion of the conformal spacer layer.
9 . The method of claim 8 , wherein the forming a sacrificial gate capping layer comprises forming the sacrificial gate capping layer having a first thickness on top of each metal gate stack and a second thickness on the sidewalls of the metal gate stacks, the first thickness being greater than the second thickness.
10 . The method of claim 9 , wherein the forming a sacrificial gate capping layer comprises forming the sacrificial gate capping layer on each sidewall of the metal gate stacks such that a thickness of the sacrificial gate capping layer decreases from the upper portion of the opening toward the bottom of the opening.
11 . The method of claim 8 , wherein the exposing the substrate to another plasma etch process comprises removing all of the dielectric from each of the openings to expose the conformal spacer layer covering a bottom each respective opening.
12 . The method of claim 11 , wherein the conformal spacer layer is further formed on a bottom of each respective opening, and the method further comprises repeating the forming a sacrificial gate capping layer and the exposing the substrate to another plasma etch process to remove the conformal spacer layer covering the bottom of each respective opening such that each of the source/drain contact regions is exposed.
13 . The method of claim 1 , further comprising forming a hard mask over the substrate, the hard mask comprising an exposure window over the openings.
14 . The method of claim 13 , wherein the forming a sacrificial gate capping layer comprises covering at least a portion of the hard mask with the sacrificial gate capping layer.
15 . A method comprising:
providing a substrate comprising a source/drain contact region, a replacement metal gate adjacent the source/drain contact region to provide a sidewall of a recess with the source/drain contact region at a bottom of the recess, a spacer formed on the sidewall of the replacement metal gate and on the source/drain contact region, and an interlayer dielectric (ILD) provided above the source/drain contact region to at least partially fill the recess;
removing a first portion of the ILD above the source/drain contact region using a first plasma etching process to uncover a portion of the spacer formed on the sidewall of the replacement metal gate;
forming a sacrificial gate capping layer on the replacement metal gate and on the spacer formed on the sidewall within the recess, the sacrificial gate capping layer having a first thickness on an upper portion of the spacer formed on the sidewall and a smaller second thickness on a lower portion of the spacer formed on the sidewall that is not covered by the ILD;
removing a second portion of the ILD using a second plasma etching process to uncover an additional portion of the spacer formed on the sidewall of the replacement metal gate; and
fully removing the ILD above the source drain contact region by repeating at least once the forming the sacrificial gate capping layer and removing the second portion of the ILD.
16 . The method of claim 15 , further comprising:
following fully removing the ILD, depositing an additional sacrificial gate capping layer on the replacement metal gate and on the spacer formed on the sidewall of the replacement metal gate; and
removing the spacer above the source/drain contact region using a third plasma etching process.
17 . The method of claim 15 , wherein the sacrificial gate capping layer includes an oxide.
18 . The method of claim 15 , wherein the substrate further includes a patterned hard mask.
19 . The method of claim 18 , wherein the forming a sacrificial gate capping layer comprises covering at least a portion of the hard mask with the sacrificial gate capping layer.