Stacked field-effect transistors having latch cross-coupling connections
A semiconductor device including a first pair of stacked transistors having a first upper transistor and a first lower transistor, a second pair of stacked transistors comprising a second upper transistor and a second lower transistor, and a first cross-connection between the first upper transistor and the second lower transistor.
1 . A semiconductor device comprising:
a first pair of stacked transistors comprising a first upper transistor and a first lower transistor, the first lower transistor comprising a first nanosheet stack;
a second pair of stacked transistors comprising a second upper transistor and a second lower transistor, the second lower transistor comprising a second nanosheet stack; and
a first cross-connection between a gate of the first upper transistor and a gate of the second lower transistor.
2 . The semiconductor device according to claim 1 , further comprising a second cross-connection between the gate of the first lower transistor and the gate of the second upper transistor.
3 . The semiconductor device according to claim 1 , wherein the first upper transistor is a first FET (field effect transistor) and the second lower transistor is a second FET, and wherein the first cross-connection forms a first gate connecting the first FET to the second FET.
4 . The semiconductor device according to claim 1 , wherein the first upper transistor is NFET and the second lower transistor is PFET.
5 . The semiconductor device according to claim 1 , wherein the first upper transistor is PFET and the second lower transistor is NFET.
6 . The semiconductor device according to claim 1 , wherein the first cross-connection comprises a front side connection.
7 . The semiconductor device according to claim 1 , wherein the first cross-connection comprises a back side connection.