IP Library › Patent Application 17724317
Patent Application
App. No. 17/724,317

METHOD FOR BUILDING CONDUCTIVE THROUGH-HOLE VIAS IN GLASS SUBSTRATES

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Quick Facts
Patent No.
US None
App. No.
17/724,317
Abstract

A method for forming a conductive through-hole-via in a glass substrate comprises: placing circuitry on a first surface of the glass substrate such that a section of the glass substrate on the first surface is exposed; applying a coating to the first surface covering both the circuitry and the exposed section of the first surface; removing the coating over the exposed section; inducing structural damage to at least a portion of the exposed section with laser radiation; and wet etching away the at least a portion of the exposed section to form a via.

Claims (48)

1 . A method for forming a conductive through-hole-via in a glass substrate, comprising:

placing circuitry on a first surface of the glass substrate such that a section of the glass substrate on the first surface is exposed;

applying a coating to the first surface covering both the circuitry and the exposed section of the first surface;

removing the coating over the exposed section;

inducing structural damage to at least a portion of the exposed section with laser radiation; and

wet etching away the at least a portion of the exposed section to form a via.

2 . The method of claim 1 , wherein the removing the coating over the exposed section is performed with photolithography or laser beam irradiation.

3 . The method of claim 1 , further comprising:

placing second circuitry on a second surface of the glass substrate such that a second section of the glass substrate on the second surface is exposed, the second surface opposing the first surface; and

applying coating to the second surface covering both the second circuitry and the second exposed section of the second surface.

4 . The method of claim 3 , further comprising:

placing filler stop on the first surface;

in a vacuum, filling the via with a conductor; and

curing the conductor;

5 . The method of claim 4 , wherein the conductive coating includes a metal plating and the applying the conductive coating includes electroplating or electroless plating.

6 . The method of claim 4 , wherein the conductive coating includes indium tin oxide.

7 . The method of claim 4 , wherein the conductive coating includes an epoxy based paste and the applying the conductive coating include vacuum screen printing.

8 . The method of claim 3 , further comprising;

applying a second coating to the first and second surfaces;

forming openings in the via area exposing a portion of the first and second circuitry to be connected;

forming conductive coating to electrically connect first and second circuitries.

9 . The method of claim 1 , further comprising:

placing filler stop on the first surface;

in a vacuum, filling the via with a conductor;

curing the conductor;

removing the filler stop; and

electrically connecting the cured conductor in the via with the circuitry.

10 . The method of claim 9 , further comprising removing excess conductor that extends out of the substrate.

11 . The method of claim 9 , wherein the conductor includes an epoxy-based paste.

12 . The method of claim 9 , wherein the conductor includes a solder paste.

13 . The method of claim 1 , wherein the applying the coating includes applying photoresist via photolithography.

14 . The method of claim 1 , wherein the applying the coating includes applying an acid-resist film patterned by laser drill holes.

15 . The method of claim 1 , wherein the wet etching uses hydrofluoric acid and the coating is resistant to the acid.

16 . The method of claim 1 , wherein the circuitry includes active matrix display circuitry.

17 . The method of claim 1 , wherein the circuitry includes passive matrix display circuitry.

18 . The method of claim 1 , further comprising:

placing filler stop on a second surface of the substrate opposing the first surface;

applying a mask over the circuitry leaving an exposed section of mask having a width greater than a width of the via;

in a vacuum, filling the via with a conductor;

vacuum screen printing the conductor over exposed circuit contact points of the circuitry;

curing the conductor; and

removing the filler stop.

19 . The method of claim 1 , further comprising removing any remaining coating.

20 . A glass substrate, comprising:

a first circuitry on a first surface and a second circuitry on a second surface;

the second surface opposing the first surface;

at least one through-glass-via electrically connecting the first and second circuitry;

wherein the at least one through-glass-via is made after the circuitries are made over the glass substrate.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE APPLICATION NUMBER 60901144 PREVIOUSLY RECORDED AT REEL: 060102 FRAME: 0130. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT . Recorded Jun 17, 2022
From: V-FINITY INTERNATIONAL
To: V-FINITY, INC.
Reel/Frame 060455/0629 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2022
From: V-FINITY INTERNATIONAL
To: V-FINITY INC.
Reel/Frame 060102/0130 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 19, 2022
From: LIU, HENG
To: V-FINITY INC.
Reel/Frame 059642/0063 →