Memory system for managing data corresponding to a plurality of zones and operating method thereof
The embodiments of the present disclosure relate to a memory system for managing data corresponding to a plurality of zones and operating method thereof. According to embodiments of the present disclosure, the memory system may include i) a memory device including a plurality of memory blocks each including a plurality of pages, and ii) a memory controller configured to write data corresponding to a plurality of zones to a first area including two or more of the plurality of memory blocks, flush the data corresponding to a first zone among the plurality of zones to a second area including two or more of the plurality of memory blocks on determination that a flush condition set for the first zone is satisfied.
1. A memory system comprising:
a memory device including a plurality of memory blocks each including a plurality of pages; and
a memory controller configured to:
write data corresponding to a plurality of zones to a first area including two or more of the plurality of memory blocks, and
flush the data corresponding to a first zone among the plurality of zones to a second area including two or more of the plurality of memory blocks on determination that a flush condition set for the first zone is satisfied,
wherein a size of each of the plurality of zones is less than or equal to a storage capacity of each of the plurality of memory blocks.
2. The memory system of claim 1 , wherein a number of memory blocks included in the first area is determined based on a minimum value of a number of active zones to which data can be written and a number of zones having data that can be flushed simultaneously from the first area to the second area.
3. The memory system of claim 1 , wherein the memory controller is further configured to determine that the flush condition set for the first zone is satisfied when the first zone is full of data, a finish command for the first zone is received from outside the memory system, or a state of the first zone is changed to a read-only state.
4. The memory system of claim 1 , wherein the memory controller maps each of the plurality of zones to one of the memory blocks included in the first area.
5. The memory system of claim 1 , wherein the memory controller maps one or more pages within a first memory block among the memory blocks included in the first area to the first zone, and
sets remaining pages, to which the first zone is not mapped, within the first memory block as invalid such that data is not to be written into the remaining pages.
6. The memory system of claim 1 , wherein the memory controller divides each of the plurality of zones into a plurality of sub-zones each having a size of one of a plurality of pages included in the first area, and
maps each of the plurality of sub-zones included in each of the plurality of zones to one of the plurality of pages included in the first area.
7. The memory system of claim 6 , wherein the memory controller is further configured to set the pages, which are mapped to the sub-zones included in the first zone, as invalid after the flushing such that valid data is not to be written into the invalid pages.
8. The memory system of claim 1 ,
wherein the memory controller flushes the data corresponding to the first zone to one or more target memory blocks included in the second area, and
wherein the memory controller is further configured to migrate valid data which is previously flushed into a source memory block in the second area, to the target memory blocks.
9. The memory system of claim 1 ,
wherein the memory controller is further configured to:
migrate valid data, among data, which is previously flushed into one or more victim memory blocks included in the second area, to one or more target memory blocks included in the second area, and
erase the victim blocks, and
wherein the memory controller flushes, after the erasing, the data corresponding to the first zone to the victim memory blocks.
10. The memory system of claim 9 , wherein the memory controller is further configured to determine, as the victim memory blocks, M memory blocks with the largest size of stored invalid data among the memory blocks included in the second area.
11. A memory controller comprising:
a memory interface for communicating with an external device including a plurality of memory blocks each including a plurality of pages; and
a control circuit configured to:
write data corresponding to a plurality of zones to a first area including two or more of the plurality of memory blocks, and
flush the data corresponding to a first zone among the plurality of zones to a second area including two or more of the plurality of memory blocks on determination that a flush condition set for the first zone is satisfied,
wherein a size of each of the plurality of zones is less than or equal to a storage capacity of each of the plurality of memory blocks.
12. An operating method of a memory system, the operating method comprising:
writing data corresponding to a plurality of zones to a first area including two or more of a plurality of memory blocks each including a plurality of pages;
determining whether a flush condition set for a first zone among the plurality of zones is satisfied; and
flushing, on determination that the flush condition set for the first zone is satisfied, the data corresponding to the first zone to a second area including two or more of the plurality of memory blocks,
wherein a size of each of the plurality of zones is less than or equal to a storage capacity of each of the plurality of memory blocks.
13. The operating method of claim 12 , wherein a number of memory blocks included in the first area is determined based on a minimum value of a number of active zones to which data can be written and a number of zones having data that can be flushed simultaneously from the first area to the second area.
14. The operating method of claim 12 , wherein the flush condition set for the first zone is determined to be satisfied when the first zone is full of data, a finish command for the first zone is received from outside the memory system, or a state of the first zone is changed to read-only state.
15. The operating method of claim 12 , wherein the writing includes mapping each of the plurality of zones to one of the memory blocks included in the first area.
16. The operating method of claim 12 ,
wherein the writing comprises:
mapping one or more pages within a first memory block among the memory blocks included in the first area to the first zone, and
setting remaining pages, to which the first zone is not mapped, within the first memory block as invalid such that data is not to be written into the remaining pages.
17. The operating method of claim 12 , wherein the writing further comprises:
dividing each of the plurality of zones into a plurality of sub-zones each having a size of one of a plurality of pages included in the first area; and
mapping each of the plurality of sub-zones included in each of the plurality of zones to one of the plurality of pages included in the first area.
18. The operating method of claim 12 , further comprising setting the pages, which are mapped to the sub-zones included in the first zone, as invalid after the flushing such that valid data is not to be written into the invalid pages.
19. The operating method of claim 12 ,
wherein data corresponding to the first zone is flushed to one or more target memory blocks included in the second area, further comprises:
migrating valid data, which is previously flushed into a source memory block in the second area, to the target memory blocks.
20. The operating method of claim 12 ,
further comprising:
migrating valid data, which is previously flushed into one or more victim memory blocks included in the second area, to one or more target memory blocks included in the second area; and
erasing the victim blocks,
wherein the data corresponding to the first zone is flushed to the victim memory blocks after the erasing.