IP Library Granted Patent US 12,261,237
Granted Patent B2
US 12,261,237 · App. 17/734,737 · Granted Mar 25, 2025

Photovoltaic devices with very high breakdown voltages

Inventors: Andre Filipe Rodrigues Augusto (Tempe, AZ); Apoorva Srinivasa (Beaverton, OR); Stuart Bowden (Tempe, AZ)
Assignee: Arizona Board of Regents on behalf of Arizona State University
H01L31/0512H01L31/0288H01L31/077H01L31/1868
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Quick Facts
Patent No.
US 12,261,237
App. No.
17/734,737
Granted
Mar 25, 2025
Kind
B2
Abstract

Photovoltaic devices with very high breakdown voltages are described herein. Typical commercial silicon photovoltaic devices have breakdown voltages below 50-100 volts (V). Even though such devices have bypass diodes to prevent photovoltaic cells from going into breakdown, the bypass diodes have high failure rates, leading to unreliable devices. A high-efficiency silicon photovoltaic cell is provided with very high breakdown voltages. By combining a device architecture with very low surface recombination and silicon wafers with high bulk resistivity (above 10 ohms centimeter (Ω-cm)), embodiments described herein achieve breakdown voltages close to 1000 V. These photovoltaic cells with high breakdown voltages improve the reliability of photovoltaic devices, while reducing their design complexity and cost.

Claims (19)

1. A solar cell, comprising:

a semiconductor substrate comprising a crystalline silicon wafer, the semiconductor substrate having a bulk resistivity greater than 10 ohms centimeter (Ω-cm), wherein the semiconductor substrate is undoped;

an n-type region over a first portion that includes a first surface of the semiconductor substrate, wherein the n-type region comprises an n-doped layer of hydrogenated amorphous silicon (a-Si:H) deposited over a first side of the semiconductor substrate;

a p-type region over a second portion that includes a second surface of the semiconductor substrate, wherein the n-type region and the p-type region form a heterojunction of the solar cell and wherein the first surface is oppositely disposed from the second surface and wherein the p-type region comprises a p-doped layer of a-Si:H deposited over a second side of the semiconductor substrate opposite the first side; and

an intrinsic layer of a-Si:H between the semiconductor substrate and the n-doped layer of a-Si:H.

2. The solar cell of claim 1 , further comprising a passivation layer over a surface of the solar cell.

3. A method for providing a photovoltaic device, the method comprising:

providing a semiconductor substrate comprising a crystalline silicon wafer, the semiconductor substrate having a bulk resistivity greater than 10 ohms centimeter (Ω-cm), wherein the semiconductor substrate is undoped;

forming an n-type region over a first portion that includes a first surface of the semiconductor substrate;

forming an intrinsic layer between the n-type region and the semiconductor substrate;

forming a p-type region over a second portion that includes a second surface of the semiconductor substrate, wherein the n-type region and the p-type region form a heterojunction of a solar cell and wherein the first surface is oppositely disposed from the second surface; and

passivating a surface of the photovoltaic device.

4. The method of claim 3 , further comprising forming a second intrinsic layer between the p-type region and the semiconductor substrate.

5. A method for providing a photovoltaic device, the method comprising:

providing a semiconductor substrate comprising a crystalline silicon wafer, the semiconductor substrate having a bulk resistivity greater than 10 ohms centimeter (Ω-cm), wherein the semiconductor substrate is undoped;

forming an n-type region over a first portion that includes a first surface of the semiconductor substrate;

forming a p-type region over a second portion that includes a second surface of the semiconductor substrate, wherein the n-type region and the p-type region form a heterojunction of a solar cell and wherein the first surface is oppositely disposed from the second surface;

forming an intrinsic layer between the p-type region and the semiconductor substrate; and

passivating a surface of the photovoltaic device.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2023
From: AUGUSTO, ANDRE FILIPE RODRIGUES; BOWDEN, STUART; SRINIVASA, APOORVA
To: ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY
Reel/Frame 062504/0947 →
CONFIRMATORY LICENSE Recorded Jun 9, 2022
From: ARIZONA STATE UNIVERSITY-TEMPE CAMPUS
To: UNITED STATES DEPARTMENT OF ENERGY
Reel/Frame 060315/0748 →
Continuity (2)
Provisional Application 63182216 · Apr 30, 2021
Related Publication 20220359778A1 · Nov 10, 2022
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