IP Library › Granted Patent US 11,876,098
Granted Patent B2
US 11,876,098 · App. 17/740,582 · Granted Jan 16, 2024

Display device having a plurality of transistors

Inventors: Susumu Kawashima (Kanagawa, JP); Naoto Kusumoto (Kanagawa, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L27/1225G02F1/1368G02F1/136286H01L27/124H01L27/1255H01L29/24H01L29/7869H01L29/78648H10K59/1213H10K59/1216H10K59/131H10K59/40G09G3/3233G09G3/3648G09G2300/0426G09G2300/0852
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Quick Facts
Patent No.
US 11,876,098
App. No.
17/740,582
Granted
Jan 16, 2024
Kind
B2
Abstract

A display device capable of improving image quality is provided. A storage node is provided in each pixel and first data can be held in the storage node. Second data is added to the first data by capacitive coupling, which can be supplied to a display element. Thus, the display device can display a corrected image. A reference potential for the capacitive coupling operation is supplied from a power supply line or the like, and thus the first data and the second data can be supplied from a common signal line.

Claims (57)

1. A display device comprising:

a first transistor;

a second transistor;

a third transistor;

a first capacitor;

a circuit block;

a first wiring; and

a second wiring,

wherein the circuit block comprises a display element, a fourth transistor, and a second capacitor,

wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor,

wherein the one of the source and the drain of the second transistor is electrically connected to a first electrode of the first capacitor,

wherein a second electrode of the first capacitor and one of a source and a drain of the third transistor are electrically connected to the fourth transistor,

wherein the other of the source and the drain of the first transistor is electrically connected to the first wiring,

wherein the other of the source and the drain of the third transistor is electrically connected to the first wiring,

wherein a gate of the second transistor is electrically connected to the second wiring,

wherein a gate of the third transistor is electrically connected to the second wiring.

2. The display device according to claim 1 ,

wherein the display element is an organic EL element,

wherein a first electrode of the organic EL element is electrically connected to a first electrode of the second capacitor and one of a source and a drain of the fourth transistor, and

wherein a gate of the fourth transistor is electrically connected to a second electrode of the second capacitor.

3. The display device according to claim 2 , wherein the other of the source and the drain of the fourth transistor is electrically connected to the other of the source and the drain of the second transistor.

4. The display device according to claim 1 ,

wherein the display element is a liquid crystal element,

wherein a first electrode of the liquid crystal element is electrically connected to a first electrode of the second capacitor and one of a source and a drain of the fourth transistor, and

wherein the other of the source and the drain of the fourth transistor is electrically connected to the second electrode of the first capacitor and the one of the source and the drain of the third transistor.

5. The display device according to claim 4 , wherein a second electrode of the second capacitor is electrically connected to the other of the source and the drain of the second transistor.

6. The display device according to claim 1 , wherein the third transistor comprises a metal oxide in a channel formation region and the metal oxide comprises In, Zn, and M, M being selected from Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, and Hf.

7. An electronic device comprising the display device according to claim 1 and a camera.

8. A display device comprising:

a first transistor;

a second transistor;

a first circuit;

a second circuit;

a first wiring; and

a second wiring,

wherein the first circuit and the second circuit each comprise a third transistor, a first capacitor, and a circuit block,

wherein the circuit block in each of the first circuit and the second circuit comprises a display element, a fourth transistor, and a second capacitor,

wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor,

wherein a first electrode of the first capacitor in each of the first circuit and the second circuit is electrically connected to the one of the source and the drain of the first transistor,

wherein in each of the first circuit and the second circuit, a second electrode of the first capacitor and one of a source and a drain of the third transistor are electrically connected to the fourth transistor,

wherein the other of the source and the drain of the third transistor in the first circuit is electrically connected to the first wiring,

wherein the other of the source and the drain of the first transistor is electrically connected to the first wiring,

wherein a gate of the third transistor in the first circuit is electrically connected to the second wiring,

wherein a gate of the third transistor in the second circuit is electrically connected to the second wiring, and

wherein a gate of the second transistor is electrically connected to the second wiring.

9. The display device according to claim 8 ,

wherein the display element is an organic EL element,

wherein in each of the first circuit and the second circuit, a first electrode of the organic EL element is electrically connected to a first electrode of the second capacitor and one of a source and a drain of the fourth transistor, and

wherein in each of the first circuit and the second circuit, a gate of the fourth transistor is electrically connected to a second electrode of the second capacitor.

10. The display device according to claim 9 , wherein the other of the source and the drain of the fourth transistor in each of the first circuit and the second circuit is electrically connected to the other of the source and the drain of the second transistor.

11. The display device according to claim 8 ,

wherein the display element is a liquid crystal element,

wherein in each of the first circuit and the second circuit, a first electrode of the liquid crystal element is electrically connected to a first electrode of the second capacitor and one of a source and a drain of the fourth transistor, and

wherein in each of the first circuit and the second circuit, the other of the source and the drain of the fourth transistor is electrically connected to the second electrode of the first capacitor and the one of the source and the drain of the third transistor.

12. The display device according to claim 11 , wherein a second electrode of the second capacitor in each of the first circuit and the second circuit is electrically connected to the other of the source and the drain of the second transistor.

13. The display device according to claim 8 , wherein the third transistor in each of the first circuit and the second circuit comprises a metal oxide in a channel formation region and the metal oxide comprises In, Zn, and M, M being selected from Al, Ti, Ga, Sn, Y, Zr, La, Ce, Nd, and Hf.

14. An electronic device comprising the display device according to claim 2 and a camera.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 10, 2022
From: KAWASHIMA, SUSUMU; KUSUMOTO, NAOTO
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 059880/0093 →
Priority Claims (1)
JP 2017-225270 · Nov 23, 2017 · national
Continuity (2)
Continuation 16760521
Related Publication 20220271062A1 · Aug 25, 2022