Pixel having an organic light emitting diode and method of fabricating the pixel

1. A pixel comprising:

a first electrode;

a second electrode;

one or more organic light emitting diode (OLED) layers between the first and second electrodes;

a backplane for electrically driving the one or more OLED layers; and

an insulating material layer deposited on said first electrode, between the first electrode and the one or more OLED layers and covering all the edges of said first electrode.

2. The pixel as claimed in claim 1 , further comprising:

a planarization dielectric layer provided between the backplane and the first electrode so as to planarize the vertical profile on the backplane, said planarization dielectric layer being in direct contact with both said backplane and said first electrode, a via in said planarization dielectric layer for providing a communication path between said backplane and said first electrode,

wherein the sidewall of said via in the planarization layer is sloped against the backplane, wherein said first electrode is directly on top of said planarized dielectric layer and extends through said via into direct contact with said backplane and wherein said insulating material layer covers said via.

3. The pixel as claimed in claim 2 , wherein said insulating material layer is patterned such that it insulates the one or more OLED layers from the first electrode at all edges of the first electrode and in and around the via, while leaving the rest of the first electrode in direct contact with the one or more OLED layers.

4. The pixel as claimed in claim 2 , further comprising continuous sidewall coverage by pixel electrode material in the via profile in the planarization dielectric layer.

5. The pixel as claimed in claim 2 , wherein the planarization dielectric layer includes photosensitive BCB, the slope of the via being adjusted by the exposure time of the photosensitive BCB.

6. The pixel as claimed in claim 1 , wherein the backplane comprises a thin-film transistor (TFT) based backplane, the TFT based backplane being vertically integrated with the one or more OLED layers and located below said first electrode to form a top-emitting OLED, the TFT based backplane comprising source and drain nodes, and further includes:

a substrate;

an interlayer dielectric layer on the source and drain nodes; and

an interconnection plate patterned on a via of the interlayer dielectric layer and being connected to the source or drain node, for said driving the one or more OLED layers.

7. The pixel as claimed in claim 6 , further comprising:

a planarization dielectric layer provided between the TFT based backplane and the first electrode; and

a shield electrode disposed between the planarization dielectric layer and the interlayer dielectric layer, which is located separately from the interconnection plate.

8. The pixel as claimed in claim 1 , wherein said insulating material layer is patterned such that it insulates the one or more OLED layers from the first electrode at all edges of the first electrode while leaving at least one portion of the first electrode in direct contact with the one or more OLED layers.

9. The pixel as claimed in claim 8 , wherein said insulating material layer includes polymer dielectric or inorganic insulator.

10. The pixel as claimed in claim 8 , wherein a material of said insulating material layer includes at least one of benzocylobutene (BCB), polyimide, polymer dielectric, silicon nitride, and a thin film inorganic.

11. The pixel as claimed in claim 1 , wherein said insulating material layer is patterned to avoid breakage of the second electrode.

12. The pixel as claimed in claim 11 , wherein said insulating material layer includes polymer dielectric or inorganic insulator.

13. The pixel as claimed in claim 11 , wherein a material of said insulating material layer includes at least one of BCB, polyimide, polymer dielectric, silicon nitride, and a thin film inorganic.

14. The pixel as claimed in claim 1 , further comprising:

a planarization dielectric layer provided between the backplane and the first electrode; and

a shield electrode formed over a thin-film transistor (TFT) formed within the backplane.

15. A method of fabricating a pixel, the pixel having a first electrode, a second electrode, one or more OLED layers between the first and second electrodes, the pixel including a substrate and a backplane for electrically driving the one or more OLED layers, the method comprising the steps of:

providing the backplane on said substrate;

depositing said first electrode above said backplane; and

depositing an insulating material layer on said first electrode and covering all the edges of said first electrode.

16. A method as claimed in claim 15 , further comprising:

providing a dielectric layer on the backplane, including the step of planarizing a vertical profile in the dielectric layer so as to planarize the vertical profile on the substrate with the backplane, said planarized dielectric layer being in direct contact with said backplane; and

forming a via in said planarization dielectric layer to provide a communication path between said backplane and said first electrode, such that the sidewall of the via in the planarization layer is sloped against the backplane,

wherein depositing said first electrode above said backplane includes depositing said first electrode directly on top of said planarized dielectric layer and extending through said via into direct contact with said backplane and wherein said depositing the insulating material layer on said first electrode comprises patterning the insulating material layer in such a way that it covers the via.

17. A method as claimed in claim 16 , wherein said depositing said insulating material layer comprises patterning the insulating material layer in such a way that it insulates the one or more OLED layers from the first electrode at all edges of the first electrode and in and around the via while leaving the rest of the first electrode in direct contact with the one or more OLED layers.

18. A method as claimed in claim 16 , wherein the planarization dielectric layer is provided including photosensitive benzocylobutene (BCB), further comprising the step of adjusting the exposure time of the photosensitive BCB such that the sidewall of the via in the planarization layer is sloped against the backplane.

19. A method as claimed in claim 16 , further comprising the step of providing continuous sidewall coverage by pixel electrode material in the via profile in the planarization dielectric layer.

20. A method as claimed in claim 15 , wherein said depositing said insulating material layer comprises patterning the insulating material layer in such a way that it insulates the one or more OLED layers from the first electrode at all edges of the first electrode while leaving at least one portion of the first electrode in direct contact with the one or more OLED layers.

21. A method as claimed in claim 15 , wherein depositing said insulating material layer comprises patterning the insulating material layer in such a way that it avoids breakage of the second electrode.