IP Library › Granted Patent US 12,088,581
Granted Patent B2
US 12,088,581 · App. 17/745,699 · Granted Sep 10, 2024

Track activities of components in endpoints having secure memory devices via identity validation

Inventors: Jeffrey Charles Shiner (Richardson, TX); Lance W. Dover (Fair Oaks, CA)
Assignee: Micron Technology, Inc.
H04L63/083H04L9/14
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Quick Facts
Patent No.
US 12,088,581
App. No.
17/745,699
Granted
Sep 10, 2024
Kind
B2
Abstract

A security server to validate identity data of computing devices having secure memory devices and track activities of components in the computing devices. The server system is configured to store data representative of a unique device secret sealed in the memory device. The server system can generate a first cryptographic key independently from the memory device generating a second cryptographic key. The memory device uses the second cryptographic key to generate identity data including a message and a verification code generated via cryptographic operations combining the message and the second cryptographic key. The server system can use the first cryptographic key to determine whether the verification code is valid for the message. If so, the security server can generate an activity record associating the activity of the computing device with identifications of respective components of the computing device confirmed via validation of the identity data.

Claims (55)

1. A method, comprising:

storing, into a server system during manufacture of a memory device, first data representative of a unique device secret configured in the memory device and inaccessible through pins of the memory device after completion of the manufacture of the memory device;

generating, in the server system, a first cryptographic key based at least in part on the first data and independently from the memory device generating a second cryptographic key based at least in part on the unique device secret configured in the memory device, wherein the memory device is installed in a computing device having a plurality of components;

receiving, in the server system, a validation request in an activity of the computing device, the validation request containing identity data having a message and a verification code generated using the message and the second cryptographic key;

determining, by the server system using the first cryptographic key, whether the verification code is valid for the message;

determining a plurality of identifications for the plurality of components respectively through validation of the identity data; and

generating an activity record associating the activity of the computing device with the plurality of identifications in response to a determination that the verification code is valid.

2. The method of claim 1 , wherein the computing device is configured to, during the activity, exclude usage of a component not in the plurality of components as identified via the identity data.

3. The method of claim 2 , wherein the plurality of components include a software component and a hardware component.

4. The method of claim 3 , further comprising:

extracting, from the message, an identification of a component in the plurality of components.

5. The method of claim 4 , wherein the first cryptographic key is generated further based on the identification.

6. The method of claim 1 , further comprising:

storing, into the server system during installation of a component into the computing device for connection to the memory device, an identification of the component in association with a public identification of the memory device;

wherein the memory device is configured to generate a pair of asymmetric cryptographic keys based at least in part on the unique device secret configured in the memory device; and

wherein a public key in the pair is configured as the public identification of the memory device; and a private key in the pair is configured to represent an identity of the memory device.

7. The method of claim 6 , wherein the message includes the public identification of the memory device; and the determining of the plurality of identifications includes looking up the identification of the component using the public identification of the memory device provided in the message.

8. The method of claim 7 , wherein the first cryptographic key is generated further based on the identification of the component.

9. The method of claim 8 , further comprises:

extracting, from the message, an identification of the activity.

10. The method of claim 9 , further comprising:

determining contributions of a plurality of entities, associated with the plurality of components respectively, to the activity based on the activity record.

11. A computing system, comprising:

memory storing instructions; and

at least one processor configured via the instructions to:

store, into a database during manufacture of a memory device, first data representative of a unique device secret configured in the memory device and inaccessible through pins of the memory device after completion of the manufacture of the memory device;

generate a first cryptographic key based at least in part on the first data and independently from the memory device generating a second cryptographic key based at least in part on the unique device secret configured in the memory device, wherein the memory device is installed in a computing device having a plurality of components;

receive a validation request in an activity of the computing device, the validation request containing identity data having a message and a verification code generated using the message and the second cryptographic key;

determine, using the first cryptographic key, whether the verification code is valid for the message;

determining a plurality of identifications for the plurality of components respectively through validation of the identity data; and

generating an activity record associating the activity of the computing device with the plurality of identifications, in response to a determination that the verification code is valid.

12. The computing system of claim 11 , wherein the at least one processor is further configured via the instructions to:

extract, from the message, an identification of a component in the plurality of components.

13. The computing system of claim 12 , wherein the first cryptographic key is generated further based on the identification.

14. The computing system of claim 11 , wherein the at least one processor is further configured via the instructions to:

store, into the database during installation of a component into the computing device for connection to the memory device, an identification of the component in association with a public identification of the memory device;

wherein the memory device is configured to generate a pair of asymmetric cryptographic keys based at least in part on the unique device secret configured in the memory device; and

wherein a public key in the pair is configured as the public identification of the memory device; and a private key in the pair is configured to represent an identity of the memory device.

15. The computing system of claim 14 , wherein the component is a software component or a hardware component.

16. The computing system of claim 14 , wherein the message includes the public identification of the memory device; and the at least one processor is further configured via the instructions to:

look up the identification of the component using the public identification of the memory device provided in the message.

17. The computing system of claim 16 , the at least one processor is further configured via the instructions to:

extract, from the message, an identification of the activity; and

determining contributions of a plurality of entities, associated with the plurality of components respectively, to the activity based on the activity record.

18. A non-transitory computer storage medium storing instructions which, when executed by a server system, cause the server system to perform a method, the method comprising:

storing, into the server system during manufacture of a memory device, first data representative of a unique device secret configured in the memory device and inaccessible through pins of the memory device after completion of the manufacture of the memory device;

generating, in the server system, a first cryptographic key based at least in part on the first data and independently from the memory device generating a second cryptographic key based at least in part on the unique device secret configured in the memory device, wherein the memory device is installed in a computing device having a plurality of components;

receiving, in the server system, a validation request in an activity of the computing device, the validation request containing identity data having a message and a verification code generated using the message and the second cryptographic key;

determining, by the server system using the first cryptographic key, whether the verification code is valid for the message;

determining a plurality of identifications for the plurality of components respectively through validation of the identity data; and

generating an activity record associating the activity of the computing device with the plurality of identifications, in response to a determination that the verification code is valid.

19. The non-transitory computer storage medium of claim 18 , wherein the method further comprises:

extracting, from the message, an identification of a component in the plurality of components; or

looking up the identification of the component using a public identification of the memory device provided in the message.

20. The non-transitory computer storage medium of claim 19 , wherein the first cryptographic key is generated further based on the identification of the component; and wherein the public identification of the memory device is a public key in a pair of asymmetric cryptographic keys generated using the unique device secret.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2022
From: SHINER, JEFFREY CHARLES; DOVER, LANCE W.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 059923/0349 →
Continuity (1)
Related Publication 20230370446A1 · Nov 16, 2023