Array substrate and method for manufacturing the same, and display device
A method for manufacturing an array substrate includes: providing a base substrate; forming gate lines and data lines intercrossing each other, the gate lines and the data lines define multiple pixel units. Multiple pixel regions are formed in each pixel unit, a display electrode having a slit is formed in each pixel region. Each data line includes multiple data line segments. In each pixel unit, each of a part of the pixel regions has a display electrode whose slit is parallel to a data line segment adjacent to this pixel region; each of another part of the pixel regions has a display electrode whose slit is non-parallel to a data line segment adjacent to this pixel region. The display electrodes in each of the pixel units are located at a same side of the gate line to which the pixel unit where the display electrodes are located is coupled.
1. A method for manufacturing an array substrate, comprising:
providing a base substrate;
forming a plurality of gate lines and a plurality of data lines intercrossing each other on the base substrate, the plurality of gate lines and the plurality of data lines define a plurality of pixel units arranged in a matrix, wherein,
a plurality of pixel regions are formed in each of the pixel units, a display electrode having a slit is formed in each of the pixel regions;
each data line is formed to include a plurality of data line segments, and any two adjacent data line segments are electrically coupled to each other,
in each pixel unit, each of a part of the pixel regions has a display electrode whose slit is parallel to a data line segment adjacent to this pixel region in the data lines; each of another part of the pixel regions has a display electrode whose slit is non-parallel to a data line segment adjacent to this pixel region in the data lines,
the data line segment has a shape comprising a polyline type, and the slit of the display electrode is of a bent type, and
each of the pixel units is formed with one thin film transistor, a source of the thin film transistor is coupled to the data line, a drain of the thin film transistor is coupled to any one of the pixel electrodes of this pixel unit, a gate of the thin film transistor is coupled to the gate line, and the display electrodes are coupled to each other, and
the display electrodes in each of the pixel units are located at a same side of the gate line to which the pixel unit where the display electrodes are located is coupled.
2. The method according to claim 1 , wherein the display electrode has a contour formed to be parallel to the data line segment adjacent thereto.
3. The method according to claim 1 , wherein each of the pixel units is formed to comprise two pixel regions provided along a direction of the data line; wherein
a gate line configured to drive the pixel unit is formed between the two pixel regions of this pixel unit.
4. The method according to claim 1 , wherein the display electrodes of each of the pixel units are formed at a same side of a gate line configured to drive the pixel unit.
5. The method according to claim 1 , wherein the display electrode comprises a pixel electrode.