IP Library › Granted Patent US 11,841,728
Granted Patent B2
US 11,841,728 · App. 17/751,115 · Granted Dec 12, 2023

Integrated circuit and semiconductor module

Inventors: Masashi Akahane (Matsumoto, JP); Taizo Asano (Matsumoto, JP)
Assignee: FUJI ELECTRIC CO., LTD.
G05F3/267H03K3/012H03K17/60
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Quick Facts
Patent No.
US 11,841,728
App. No.
17/751,115
Granted
Dec 12, 2023
Kind
B2
Abstract

An integrated circuit, including: a first current source; a second current source provided in parallel to the first current source; a first resistor with one end coupled to an output of the first current source; a first bipolar transistor that is diode-connected and is coupled to the other end of the first resistor; a second bipolar transistor that is diode-connected and is coupled to an output of the second current source; a second resistor coupled to the second bipolar transistor; and an output circuit configured to output a voltage based on a first voltage outputted from the first current source and a second voltage outputted from the second current source.

Claims (80)

1. An integrated circuit, comprising:

a first current source having an output configured to output a first voltage;

a second current source provided in parallel to the first current source and having an output configured to output a second voltage;

a first resistor having two ends, one end thereof being coupled to the output of the first current source;

a first bipolar transistor which is diode-connected and is coupled to the other end of the first resistor;

a second bipolar transistor which is diode-connected and is coupled to the output of the second current source;

a second resistor coupled to the second bipolar transistor, one end of the second resistor being grounded; and

an output circuit configured to output a third voltage based on the first voltage outputted from the first current source and the second voltage outputted from the second current source.

2. The integrated circuit according to claim 1 , wherein

the first and second bipolar transistors are of a same size.

3. The integrated circuit according to claim 1 , wherein

the first and second resistors have resistance values equal to each other.

4. The integrated circuit according to claim 1 , wherein

the first current source includes a first metal oxide semiconductor (MOS) transistor,

the second current source includes a second MOS transistor,

source electrodes of the first and second MOS transistors are coupled to a power supply line, and

gate electrodes of the first and second MOS transistors have a voltage applied to.

5. The integrated circuit according to claim 4 , wherein

the first and second MOS transistors are of a same size.

6. The integrated circuit according to claim 4 , further comprising:

a third bipolar transistor; and

a bias voltage source configured to generate a bias voltage corresponding to a value of a current flowing through the third bipolar transistor, wherein

the bias voltage source supplies the generated bias voltage to the gate electrodes of the first and second MOS transistors.

7. The integrated circuit according to claim 4 , further comprising:

a first current mirror circuit including a P-MOS transistor;

a second current mirror circuit including an N-MOS transistor supplied with a current from the first current mirror circuit, the second current mirror circuit having a first end and a second end;

another resistor coupled to the first end of the second current mirror circuit;

a third bipolar transistor which is diode-connected and is coupled to the another resistor; and

a fourth bipolar transistor which is diode-connected and is coupled to the second end of the second current mirror circuit, wherein

a node coupling the first and second current mirror circuits is coupled to the gate electrodes of the first and second MOS transistors.

8. A semiconductor module, comprising:

the integrated circuit according to claim 1 ; and

a switching device having a control electrode, wherein

the integrated circuit further includes a control circuit that is coupled to the control electrode of the switching device, and that controls driving of the switching device based on an input signal of the control circuit and the third voltage.

9. An integrated circuit, comprising:

a first current source having an output configured to output a first voltage;

a second current source provided in parallel to the first current source and having an output configured to output a second voltage;

a first resistor having two ends, one end thereof being coupled to the output of the first current source;

a first bipolar transistor which is diode-connected and is coupled to the other end of the first resistor;

a second bipolar transistor which is diode-connected and is coupled to the output of the second current source;

a second resistor coupled to the second bipolar transistor; and

an output circuit configured to output a third voltage based on the first voltage outputted from the first current source and the second voltage outputted from the second current source, wherein the output circuit includes:

a third resistor having two ends, one end thereof being coupled to the output of the first current source;

a fourth resistor having two ends, one end thereof being coupled to the output of the second current source and the other end thereof being coupled to the other end of the third resistor, and

the third voltage is a voltage at a node between the third and fourth resistors.

10. The integrated circuit according to claim 9 , wherein

the third and fourth resistors have resistance values equal to each other.

11. An integrated circuit, comprising:

a first current source having an output configured to output a first voltage;

a second current source provided in parallel to the first current source and having an output configured to output a second voltage;

a first resistor having two ends, one end thereof being coupled to the output of the first current source;

a first bipolar transistor which is diode-connected and is coupled to the other end of the first resistor;

a second bipolar transistor which is diode-connected and is coupled to the output of the second current source;

a second resistor coupled to the second bipolar transistor;

an output circuit configured to output a third voltage based on the first voltage outputted from the first current source and the second voltage outputted from the second current source; and

a third bipolar transistor configured to generate a reference current, wherein

each of the first and second current sources generates a current using the reference current.

12. An integrated circuit, comprising:

a first current source having an output configured to output a first voltage;

a second current source provided in parallel to the first current source and having an output configured to output a second voltage;

a first resistor having two ends, one end thereof being coupled to the output of the first current source;

at least one first bipolar transistor that is diode-connected and is coupled to the other end of the first resistor;

a plurality of first trimming devices coupled to the output of the second current source;

a plurality of second bipolar transistors which are each diode-connected and are respectively coupled to the plurality of first trimming devices;

a second resistor having two ends, one end thereof being coupled to the plurality of second bipolar transistors; and

an output circuit configured to output a third voltage based on the first voltage outputted from the first current source and the second voltage outputted from the second current source.

13. The integrated circuit according to claim 12 , further comprising:

a plurality of second trimming devices coupled to the other end of the first resistor, wherein

the at least one first bipolar transistor includes a plurality of first bipolar transistors, which are coupled to the other end of the first resistor respectively through the plurality of second trimming devices.

14. The integrated circuit according to claim 13 , wherein

at least either the plurality of first trimming devices or the plurality of second trimming devices are a plurality of first switches, and

the integrated circuit further comprises a first control circuit configured to control on/off operation of the plurality of first switches.

15. The integrated circuit according to claim 14 , wherein

at least one of the first resistor or the second resistor is a variable resistor, a resistance value of which is controlled by the first control circuit.

16. The integrated circuit according to claim 15 , wherein

the variable resistor includes a plurality of second switches, and

the first control circuit controls on/off operation of the plurality of second switches, to thereby vary the resistance value of the variable resistor.

17. The integrated circuit according to claim 14 , further comprising

a memory circuit storing information representing a status of the plurality of first switches, and

the first control circuit controls the on/off operation of the plurality of first switches based on the information.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2022
From: AKAHANE, MASASHI; ASANO, TAIZO
To: FUJI ELECTRIC CO., LTD.
Reel/Frame 059989/0967 →
Priority Claims (2)
JP 2021-110575 · Jul 2, 2021 · national
JP 2022-007683 · Jan 21, 2022 · national
Continuity (1)
Related Publication 20230006656A1 · Jan 5, 2023