Optical phased array structure and fabrication techniques
Methods of manufacturing and operating a monolithically integrated optical phase array (OPA) chip device, and the device itself. A three-dimensional (3-D) integrated optical phase array (OPA) chip device. A system of complementary metal-oxide-semiconductor (CMOS) electronics integrated with a three-dimensional integrated optical array chip device. A method of three-dimension photonic integration to improve optical power in optical phase arrays.
1. A method of building a three-dimensional integrated optical array chip device, comprising the steps of:
building an optical power distribution network on at least one photonic waveguide layer;
connecting one or more phase shifters to the optical power distribution network;
coupling one or more OPA chiplets to an interposer;
integrating the interposer with the one or more OPA chiplets; and
fabricating an emission window,
wherein the one or more OPA chiplets comprise emitter arrays (EA) and phase shifters and wherein the emission window is opened within the interposer as a through-substrate opening in the region aligned with the EA on the one or more OPA chiplets.
2. The method of claim 1 , wherein the one or more OPA chiplets are integrated on top of the interposer.
3. The method of claim 1 , wherein at least one photonic waveguide layer is fabricated on top of the one or more OPA chiplets.
4. The method of claim 1 , wherein one or more waveguides on the one or more OPA chiplets feeds one or more sub-arrays of emitters.
5. The method of claim 1 , wherein the one or more OPA chiplets are flip-chip integrated on top of or placed next to the interposer.
6. The method of claim 1 , wherein a plurality of OPA chiplets are arranged in a column.
7. The method of claim 1 , wherein the EAs from all OPA chiplets form an overall optical phase array aperture.
8. The method of claim 1 , wherein the optical distribution network comprises one or more selected from the group of waveguides, couplers, and passive devices to split an optical input from a laser source when the device operates in the transmit mode, or to combine the light received by all OPA chiplets when the device operates in the receive mode.
9. The method of claim 1 , further comprising the step of: connecting the interposers input/output ports to the input/output ports of the one or more OPA chiplets via an optical coupling.
10. The method of claim 9 , wherein the coupling is between one or more output waveguides on the photonic waveguide layer and one or more input waveguides on the OPA chiplets.
11. The method of claim 10 , wherein the coupling is structured as horizontal through edge-to-edge coupling.
12. The method of claim 10 , wherein the coupling is structured as vertical by mode conversion between a plurality of tapered waveguides.
13. The method of claim 1 , further comprising the step of: fabricating a reflector on the OPA chiplet or on the interposer.
14. The method of claim 1 , wherein the OPA chiplet is built based on at least one of the following photonics technologies: silicon photonics (SiPh), silicon nitride photonics (SiN), hybrid silicon photonics (SiPh with SiN), lithium niobate photonics (LN), or III-V photonics.
15. The method of claim 1 , wherein the photonic waveguide layer comprises at least one of silicon, silicon nitride, lithium niobate, or III-V materials.
16. A method of building a three-dimensional integrated optical array chip device, comprising the steps of:
building an optical power distribution network on at least one photonic waveguide layer;
connecting one or more phase shifters to the optical power distribution network; coupling one or more OPA chiplets to an interposer; and
integrating the interposer with the one or more OPA chiplets;
wherein the one or more OPA chiplets comprise emitter arrays (EA) and phase shifters;
wherein the one or more OPA chiplets are integrated on top of the interposer; and
wherein at least one photonic waveguide layer is fabricated on top of the one or more OPA chiplets;
wherein one or more waveguides on the one or more OPA chiplets feeds one or more sub-arrays of emitters; and wherein the one or more OPA chiplets are flip-chip integrated on top of or placed next to the interposer, wherein a plurality of OPA chiplets are arranged in a column;
wherein the EAs from all OPA chiplets form an overall optical phase array aperture;
wherein the optical distribution network comprises one or more selected from the group of waveguides, couplers, and passive devices to split an optical input from a laser source when the device operates in the transmit mode, or to combine the light received by all OPA chiplets when the device operates in the receive mode;
and wherein the method further comprises the step of:
connecting input/output ports of the interposer to input/output ports of the one or more OPA chiplets via an optical coupling; and
fabricating an emission window, wherein the emission window is opened within the interposer as a through-substrate opening in the region aligned with the EA on the one or more OPA chiplets.
17. The method of claim 16 , further comprising the step of: fabricating a reflector on the OPA chiplet or on the interposer.
18. A method of building a three-dimensional integrated optical array chip device, comprising the steps of:
building an optical power distribution network on at least one photonic waveguide layer;
connecting one or more phase shifters to the optical power distribution network;
coupling one or more OPA chiplets to an interposer;
integrating the interposer with the one or more OPA chiplets; and
fabricating an emission window,
wherein the one or more OPA chiplets comprise emitter arrays (EA) and phase shifters and wherein the emission window is a backside opening patterned into each OPA chiplet, wherein the opening can be patterned using etching or other fabrication techniques.
19. The method of claim 18 , further comprising the step of: fabricating a reflector on the OPA chiplet or on the interposer.