Electronic system for generating multiple power supply output voltages with one regulation loop

1. An electronic system ( 1 ) comprising:

a plurality of sub blocks ( 21 , 22 , . . . ), each one being required to be supplied with a different power supply output voltage (VDD1, VDD2, . . . ),

a differential amplifier ( 3 ) having a plurality of outputs, an input reference voltage (VRF) being applied to a first input of the differential amplifier,

a voltage regulation loop with a transistor feedback connected to a first output of the differential amplifier and to a second input of the differential amplifier, said loop comprising a first transistor ( 40 ) and a variable resistor ( 5 ) external to the differential amplifier ( 3 ),

a plurality of additional transistors ( 41 , 42 , . . . ), each output of the differential amplifier being connected to a gate or base of one of said additional transistors and the drain, source, emitter or collector of each additional transistor being connected to one of said sub-blocks, and

a last stage of said differential amplifier ( 3 ) comprising at least one component internal to the differential amplifier ( 3 ) and additional to said variable resistor ( 5 ) that delivers multiple different power supply output voltages from said differential amplifier ( 3 );

wherein:

the input reference voltage (VRF) and the variable resistor are configured such that a first sub block ( 21 ) is supplied with its required power supply output voltage (VDD1) by the transistor it is connected to,

and said differential amplifier is configured to output on each of its outputs a power supply reference voltage (VG1, VG2) such that each sub block ( 22 , . . . ) other than the first sub block is supplied with its required power supply output voltage (VDD2 . . . ) by the transistor it is connected to;

wherein a potential at one of said at least one component terminals is set to a first power supply reference voltage (VG1), a second power supply reference voltage (VG2) is generated at an other terminal of said at least one component;

wherein said at least one component is among a resistance, a diode, a MOS transistor, or a switched capacitor;

wherein the at least one component in the last stage of said differential amplifier ( 3 ) generates a resistor offset (Roffset) between an output transistor NOUT and a current source Iref of the differential amplifier ( 3 ) to generate a first power supply reference voltage VG1 at a drain of the output transistor NOUT and generate a voltage offset Voff leading to a voltage VG2=VG1+Voff at its terminal connected to the current source Iref.

2. The electronic system according to claim 1 , wherein said sub blocks are among a flash memory ( 22 ), a digital circuit ( 21 ), an analog circuit, or an input/output interface.

3. The electronic system according to claim 2 , wherein said first sub block ( 21 ) is a digital circuit to be supplied with a first power supply output voltage (VDD1) equal to 1.2 V, a second sub block ( 22 ) is a flash memory to be supplied with a second power supply output voltage (VDD2) equal to 1.5 V and said at least one component is a resistance set to a value equal to 300 mV divided by the current flowing through it.

4. The electronic system of claim 1 is embedded on a System-On-Chip (SOC).

5. The electronic system of claim 1 is embedded in a smartcard chip of a smartcard.

6. An electronic system ( 1 ) comprising:

a plurality of sub blocks ( 21 , 22 , . . . ), each one being required to be supplied with a different power supply output voltage (VDD1, VDD2, . . . ),

a voltage regulation loop with a transistor feedback connected to a first output of a differential amplifier and to a second input of the differential amplifier, said loop comprising a first transistor ( 40 ) and a variable resistor ( 5 ) external to the differential amplifier ( 3 ),

the differential amplifier ( 3 ) having a plurality of outputs, an input reference voltage (VRF) being applied to a first input of the differential amplifier ( 3 );

wherein said differential amplifier ( 3 ) includes a last stage comprising at least one component among a resistance, a diode, a MOS transistor, or a switched capacitor that is internal to the differential amplifier ( 3 );

wherein the at least one component said differential amplifier ( 3 ) to drive multiple different power supply output voltages; and

a plurality of additional transistors ( 41 , 42 , . . . ), each output of the differential amplifier being connected to a gate or base of one of said additional transistors and the drain, source, emitter or collector of each additional transistor being connected to one of said sub-blocks,

wherein:

the input reference voltage (VRF) and the variable resistor are configured such that a first sub block ( 21 ) is supplied with its required power supply output voltage (VDD1) by the transistor it is connected to, and

said differential amplifier is configured to output on each of its outputs a power supply reference voltage (VG1, VG2) such that each sub block ( 22 , . . . ) other than the first sub block is supplied with its required power supply output voltage (VDD2 . . . ) by the transistor it is connected to;

wherein the at least one component in the last stage of said differential amplifier ( 3 ) generates a resistor offset (Roffset) between an output transistor NOUT and a current source Iref of the differential amplifier ( 3 ) to generate a first power supply reference voltage VG1 at a drain of the output transistor NOUT and generate a voltage offset Voff leading to a voltage VG2=VG1+Voff at its terminal connected to the current source Iref.