Imaging device and electronic device
An imaging device in which noise can be reduced, and an electronic device using this device. The imaging device includes a light receiving element, and a read circuit. A field effect transistor in the read circuit has a semiconductor layer in which a channel is formed, a gate electrode that covers the semiconductor layer, and a gate insulating film disposed between the semiconductor layer and the gate electrode. The semiconductor layer has a main surface, and a first side surface on one end side of the main surface in a gate width direction of the field effect transistor. The gate electrode has a first portion that faces the main surface via the gate insulating film, and a second portion that faces the first side surface via the gate insulating film. A crystal plane of the first side surface is a plane or a plane equivalent to the plane.
1. An imaging device, comprising:
a light receiving element; and
a read circuit configured to read an electrical signal photoelectrically converted by the light receiving element,
wherein a field effect transistor included in the read circuit includes
a semiconductor layer in which a channel is formed,
a gate electrode configured to cover the semiconductor layer, and
a gate insulating film disposed between the semiconductor layer and the gate electrode,
the semiconductor layer includes
a main surface, and
a first side surface located on one end side of the main surface in a gate width direction of the field effect transistor,
the gate electrode includes
a first portion configured to face the main surface via the gate insulating film, and
a second portion configured to face the first side surface via the gate insulating film, and
a crystal plane of the first side surface is a (100) plane or a plane equivalent to the (100) plane.
2. The imaging device according to claim 1 ,
wherein the semiconductor layer further includes a second side surface located on the other end side of the main surface in the gate width direction,
the gate electrode further includes a third portion configured to face the second side surface via the gate insulating film, and
a crystal plane of the second side surface is a (100) plane or a plane equivalent to the (100) plane.
3. The imaging device according to claim 1 , wherein a crystal plane of the main surface is a (100) plane or a plane equivalent to the (100) plane.
4. The imaging device according to claim 1 , wherein the read circuit includes, as the field effect transistor, an amplification transistor configured to amplify the electrical signal.
5. The imaging device according to claim 4 , wherein the read circuit further includes, as the field effect transistor, a selection transistor configured to switch connection between the amplification transistor and a signal line on or off.
6. The imaging device according to claim 4 , wherein the read circuit further includes, as the field effect transistor, a reset transistor configured to switch connection between a floating diffusion for temporarily holding an electrical signal output from the light receiving element and a power supply line on or off.
7. The imaging device according to claim 1 ,
wherein the field effect transistor includes a plurality of the semiconductor layers, and
the plurality of the semiconductor layers are disposed side by side at intervals in the gate width direction of the field effect transistor.
8. An electronic device, comprising:
an optical component;
an imaging device on which light transmitted through the optical component is incident; and
a signal processing circuit configured to process a signal output from the imaging device,
wherein the imaging device includes
a light receiving element; and
a read circuit configured to read an electric signal photoelectrically converted by the light receiving element,
a field effect transistor included in the read circuit includes
a semiconductor layer in which a channel is formed,
a gate electrode configured to cover the semiconductor layer, and
a gate insulating film disposed between the semiconductor layer and the gate electrode,
the semiconductor layer includes
a main surface, and
a first side surface located on one end side of the main surface in a gate width direction of the field effect transistor,
the gate electrode includes
a first portion configured to face the main surface via the gate insulating film, and
a second portion configured to face the first side surface via the gate insulating film, and
a crystal plane of the first side surface is a (100) plane or a plane equivalent to the (100) plane.