IP Library Granted Patent US 11,687,699
Granted Patent B2
US 11,687,699 · App. 17/771,967 · Granted Jun 27, 2023

Method for modeling sequence impedance of modular multilevel converter under phase locked loop coupling

Inventors: Fujin Deng (Nanjing, CN); Yun Zhou (Nanjing, CN); Hanlu Zhang (Nanjing, CN); Chengkai Liu (Nanjing, CN); Jianzhong Zhang (Nanjing, CN)
Assignee: SOUTHEAST UNIVERSITY
G06F30/398H02J3/381H02J2203/20
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Quick Facts
Patent No.
US 11,687,699
App. No.
17/771,967
Granted
Jun 27, 2023
Kind
B2
Abstract

The present invention discloses a method for modeling sequence impedance of a modular multilevel converter (MMC) under phase locked loop (PLL) coupling. The method includes the following steps: S1, establishing a circuit topology model; S2, establishing a PLL output characteristic model; S3, establishing a PI controller output control small signal model under a dq axis; S4, deducing a modulation small signal; and S5, calculating MMC port impedance. According to the method, a precise MMC port impedance model is established by analyzing a double mirror frequency coupling effect in the output of a modulation signal in a control link caused by a phase angle disturbance and comprehensively considering the combination of the multi-harmonic coupling effect of an MMC. On one hand, the proposed modeling method aims at a common MMC adopting current closed-loop control, in which a half-bridge sub-module is adopted, a circuit topological structure and a control structure are both more common, and a mathematical model is easy to establish. On the other hand, the physical significance of an impedance analysis method is clear, the modeling process is modular and is easy to understand and implement, and the inverter port impedance can be measured on site, so that the correctness of theoretical modeling can be conveniently verified.

Claims (442)

1. A method for modeling sequence impedance of a modular multilevel converter (MMC) under phase locked loop (PLL) coupling, comprising the following steps:

S1, establishing a circuit topology model

dividing a current-controlled MMC grid-connected system into two parts: a circuit topology and a control link, and acquiring relevant parameters;

S2, establishing a PLL output characteristic model

establishing a relationship model between a PLL output phase angle small signal Δθ and a q-axis power grid voltage small signal of a power grid and a PLL controller G pll according to an abc/dq transformation formula under a phase angle disturbance and a PLL control signal path;

S3, establishing a PI controller output control small signal model under a dq axis

establishing a relationship model between control small signals Δe d and Δe q under the dq axis and current small signals Δi d and Δi q under the dq axis, current steady-state operating points i d and i q under the dq axis, and the phase angle small signal Δθ and a current controller G i according to a current closed-loop control path;

S4, deducing a modulation small signal

obtaining modulation small signals of frequency f p output by a phase-a control system and frequency f p ∓2f l generated under the action of PLL coupling according to the control small signals Δe d and Δe q and in consideration of a dq/abc transformation formula under a phase angle disturbance;

S5, calculating MMC port impedance

substituting a system model into a harmonic state space matrix, calculating a current response Δi g when injecting a voltage disturbance Δu g , and finally calculating MMC port impedance according to a port impedance definition.

2. The method for modeling sequence impedance of the MMC under PLL coupling according to claim 1 , wherein the establishing a circuit topology model in S1 is as follows:

{

Ri

g

+

L

di

g

dt

+

2

u

g

=

n

l

u

cl

-

n

u

u

cu

2

Ri

c

+

2

L

di

c

dt

+

n

l

u

cl

+

n

u

u

cu

=

U

dc

C

arm

du

cu

dt

=

n

u

(

i

c

+

i

g

2

)

C

arm

du

cl

dt

=

n

l

(

i

c

-

i

g

2

)

(

1

)

in formula (1), R is parasitic resistance of an MMC bridge arm, L is filtering inductance of the MMC bridge arm, C arm is equivalent capacitance of a bridge arm, u cu Σ is a sum of capacitance voltages of an upper bridge arm, u cl Σ is a sum of capacitance voltages of a lower bridge arm, n u is a modulation signal of the upper bridge arm, n l is a modulation signal of the lower bridge arm, i c is the circulating current, i g is the ac-side current, U dc is a direct current voltage, and u g is an alternating current power grid voltage.

3. The method for modeling sequence impedance of the MMC under PLL coupling according to claim 1 , wherein a relationship model of a PLL output phase angle small signal Δθ in S2 is as follows:

Δ

θ

=

G

PLL

(

s

j

ω

1

)

s

j

ω

1

+

u

d

G

PLL

(

s

j

ω

1

)

Δ

u

qp

/

n

0

=

H

PLL

(

s

j

ω

1

)

Δ

u

qp

/

n

0

(

2

)

in formula (2), s∓jω is a controller frequency offset when injecting positive and negative sequence disturbances, a subscript p/n represents a variable when injecting the positive and negative sequence disturbances, and n d is a d-axis steady-state operating point of a power grid voltage;

Δu qp/n0 =ΔU g cos(ω p ∓ω l )t   (3)

ΔU g is an injected disturbance voltage amplitude, ω p is an injected disturbance angular frequency, and a PLL transfer function is defined as H PLL .

4. The method for modeling sequence impedance of the MMC under PLL coupling according to claim 1 , wherein a relationship model of a system output control small signal under a dq axis in S3 is as follows:

{

Δ

i

dp

/

n

=

Δ

i

dp

/

n

0

+

i

q

Δ

θ

Δ

i

qp

/

n

=

Δ

i

qp

/

n

0

+

i

d

Δ

θ

(

4

)

{

Δe

dp

/

n

=

Δ

i

dp

/

n

G

i

(

s

j

ω

1

)

Δ

e

qp

/

n

=

-

Δ

i

qp

/

n

G

i

(

s

j

ω

1

)

.

(

5

)

5. The method for modeling sequence impedance of the MMC under PLL coupling according to claim 1 , wherein a phase-a control system output modulation small signal in S4 is calculated as follows:

Δe ref/n Δ[Δe dp/n cos(θ+Δθ)−Δe qp/n sin(θ+Δθ)]2/U dc   (6)

in formula (6), θ is a power grid voltage phase, it is now defined that θ=ωt cot and a power grid angular frequency ω=100πrad/s, and modulation small signals of frequencies f p and f p ∓2f l contained in an output phase-a of a control system are obtained by substituting specific expressions of each variable into the above formula:

Δ

e

refp

/

n

=

{

-

1

2

[

u

q

+

i

q

G

i

(

s

j

ω

1

)

]

[

cos

(

ω

p

t

-

π

2

)

+

cos

(

(

ω

p

2

ω

1

)

t

-

π

2

)

]

-

1

2

[

u

d

+

i

d

G

i

(

s

j

ω

1

)

]

[

cos

(

ω

p

2

ω

1

)

t

-

cos

ω

p

t

]

}

2

H

PLL

(

s

j

ω

1

)

Δ

U

g

/

U

dc

.

(

7

)

6. The method for modeling sequence impedance of the MMC under PLL coupling according to claim 1 , wherein the impedance calculation formula in S5 is as follows:

Z

MMC

(

ω

p

)

=

-

Δ

U

g

(

ω

p

)

Δ

I

g

(

ω

p

)

(

8

)

in formula (8), ΔU g (ω p ) is a complex vector form of a grid-connected voltage disturbance at ω p , and ωI g (ω p ) is a complex vector form of a grid-connected current disturbance at ω p .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2022
From: DENG, FUJIN; ZHOU, YUN; ZHANG, HANLU; LIU, CHENGKAI; ZHANG, JIANZHONG
To: SOUTHEAST UNIVERSITY
Reel/Frame 060538/0832 →
Priority Claims (1)
CN 202110115609.3 · Jan 28, 2021 · national
Continuity (1)
Related Publication 20230118255A1 · Apr 20, 2023
Cited By (1)
US 12,445,060