Granted Patent B2

US 12,488,716 · App. 17/784,644 · Granted Dec 2, 2025

Inventors: Xuehuan Feng (Beijing, CN); Xuelian Cheng (Beijing, CN)

Assignees: Hefei BOE Joint Technology Co., Ltd.; Beijing BOE Technology Development Co., Ltd.

G09G3/006G09G3/3266G09G2310/08G09G2330/12

Abstract

Claims (54)

1 . A method of repairing a gate-on-array circuit comprising N number of stages of shift registers, the N number of stages of shift registers comprising a X-th stage shift register, 1≤X≤N, X and N being positive integers;

wherein the method comprises at least one of:

disconnecting a X-th stage gate driving signal output terminal from a X-th stage gate driving signal output line;

disconnecting a X-th stage compensation control signal output terminal from a X-th stage compensation control signal output line; or

disconnecting a X-th stage carry signal output terminal from a X-th stage carry signal output line;

wherein the X-th stage gate driving signal output terminal, the X-th stage compensation control signal output terminal, and the X-th stage carry signal output terminal are terminals of a single shift register of the X-th stage; and

the X-th stage gate driving signal output line, the X-th stage compensation control signal output line, and the X-th stage carry signal output line are output lines of the single shift register of the X-th stage;

the method further comprises at least one of:

connecting the X-th stage gate driving signal output line to a repair gate driving signal output terminal through a gate driving signal output repair line;

connecting the X-th stage compensation control signal output line to a repair compensation control signal output terminal through a compensation control signal output repair line; or

connecting the X-th stage carry signal output line to a repair carry signal output terminal through a carry signal output repair line;

wherein the X-th stage gate driving signal output line, the X-th stage compensation control signal output line, and the X-th stage carry signal output line are different from each other;

the X-th stage compensation control signal output terminal and the X-th stage carry signal output terminal are different from each other;

the repair gate driving signal output terminal, the repair compensation control signal output terminal, and the repair carry signal output terminal are different from each other; and

the compensation control signal output repair line and the carry signal output repair line are different from each other.

2 . The method of claim 1 , wherein the repair gate driving signal output terminal is a gate driving signal output terminal of a repair shift register;

the repair compensation control signal output terminal is a compensation control signal output terminal of the repair shift register; or

the repair carry signal output terminal is a carry signal output terminal of the repair shift register.

3 . The method of claim 1 , further comprising at least one of:

connecting a pull-up node connecting terminal of a repair shift register to a n-th stage pull-up node of a n-th stage shift register through a pull-up node repair line, 1≤n≤N, and n≠X, n being a positive integer;

connecting a first pull-down node connecting terminal of the repair shift register to a n-th stage first pull-down node of the n-th stage shift register through a first pull-down node repair line; or

connecting a second pull-down node connecting terminal of the repair shift register to a n-th stage second pull-down node of the n-th stage shift register through a second pull-down node repair line.

4 . The method of claim 3 , wherein n=X−1.

5 . The method of claim 2 , wherein the repair shift register and the X-th stage shift register are coupled to at least one of:

one or more carry output clock signal lines configured to provide a same carry output clock signal;

one or more compensation clock signal lines configured to provide a same compensation clock signal; or

one or more gate driving clock signal lines configured to provide a same gate driving clock signal.

6 . The method of claim 2 , wherein the repair shift register and the X-th stage shift register are coupled to at least one of a same carry output clock signal line, a same compensation clock signal line, or a same gate driving clock signal line.

7 . The method of claim 2 , wherein the gate-on-array circuit comprises:

the N number of stages of shift registers;

K number of repair shift registers; and

at least one of M number of carry output clock signal lines, M number of compensation clock signal lines, or M number of gate driving clock signal lines;

wherein the N number of stages of shift registers comprise K groups, a respective group of the K groups comprising M number of shift registers, N=(M*K), K and M being positive integers; and

a m-th shift register in the respective group is coupled to at least one of a m-th carry output clock signal line, a m-th compensation clock signal line, or a m-th gate driving clock signal line.

8 . The method of claim 2 , wherein the repair shift register and the X-th stage shift register are coupled to at least one of:

two different carry output clock signal lines configured to provide a same carry output clock signal;

two different compensation clock signal lines configured to provide a same compensation clock signal; or

two different gate driving clock signal lines configured to provide a same gate driving clock signal.

9 . The method of claim 2 , wherein the gate-on-array circuit comprises:

the N number of stages of shift registers;

the repair shift register;

at least one of M number of carry output clock signal lines, M number of compensation clock signal lines, or M number of gate driving clock signal lines; and

at least one of a repair carry output clock signal line, a repair compensation clock signal line, or a repair gate driving clock signal line;

wherein the N number of stages of shift registers comprise K groups, a respective group of the K groups comprising M number of shift registers, N=(M*K), K and M being positive integers;

a m-th shift register in the respective group is coupled to at least one of a m-th carry output clock signal line, a m-th compensation clock signal line, or a m-th gate driving clock signal line; and

the repair shift register is coupled to at least one of the repair carry output clock signal line, the repair compensation clock signal line, or the repair gate driving clock signal line.

10 . The method of claim 9 , further comprising at least one of:

providing a same carry output clock signal to the repair carry output clock signal line and a carry output clock signal line coupled to the X-th stage shift register;

providing a same compensation clock signal to the repair compensation clock signal line and a compensation clock signal line coupled to the X-th stage shift register; or

providing a same gate driving clock signal to the repair gate driving clock signal line and a gate driving clock signal line coupled to the X-th stage shift register.

11 . The method of claim 1 , wherein the repair gate driving signal output terminal is a n-th stage gate driving signal output terminal of a n-th stage shift register, 1≤n≤N, and n≠X;

the repair compensation control signal output terminal is a n-th stage compensation control signal output terminal of the n-th stage shift register; or

the repair carry signal output terminal is a n-th stage repair carry signal output terminal of the n-th stage shift register.

12 . The method of claim 11 , wherein n=X−1.

Assignments (2)

Continuity (1)

References Cited (20)