Display panel, circuit board, and display device
A display panel, a circuit board and a display device are provided, belonging to the field of displays. The display panel has a display region and a binding region which is on at least one side of the display region, and the display panel includes: a substrate; a plurality of signal pins on the substrate and in the binding region, the signal pins being arranged at intervals in a first direction and being connected to the circuit board; and at least one non-signal pin on the substrate and between two adjacent signal pins.
1 . A display panel, wherein the display panel has a display region and a binding region which is on at least one side of the display region, and the display panel comprises:
a substrate;
a plurality of signal pins on the substrate and in the binding region, the signal pins being arranged at intervals in a first direction and being used to be connected to a circuit board; and
at least one non-signal pin on the substrate and between two adjacent signal pins,
wherein the signal pins comprise:
a power supply voltage pin and a common voltage signal pin; wherein in the first direction, pin widths of the power supply voltage pin and the common voltage signal pin are larger than widths of the other signal pins.
2 . The display panel according to claim 1 , wherein in the case that the at least one non-signal pin is provided between two adjacent signal pins, the two signal pins satisfy the following condition that:
a voltage of at least one of the two adjacent signal pins exceeds a first voltage threshold.
3 . The display panel according to claim 1 , wherein in the case that the at least one non-signal pin is provided between two adjacent signal pins, the two signal pins satisfy the following condition that:
a difference between voltages of the two adjacent signal pins exceeds a second voltage threshold.
4 . The display panel according to claim 1 , wherein each of the signal pins comprises a first signal pin and a second signal pin; and
one non-signal pin is arranged between two adjacent first signal pins, and a plurality of non-signal pins is arranged between two adjacent second signal pins.
5 . The display panel according to claim 1 , wherein the number of the non-signal pins arranged between the two adjacent signal pins is one of:
positively correlated with a voltage of a signal pin having a higher voltage of the two signal pins; and
positively correlated with a difference between the voltages of the two signal pins.
6 . The display panel according to claim 5 , wherein the two adjacent signal pins are respectively a common voltage signal pin and a test pin; and
two non-signal pins are arranged between the common voltage signal pin and the test pin.
7 . The display panel according to claim 5 , wherein the two adjacent signal pins are respectively a power supply voltage pin and a test pin; and
three non-signal pins are arranged between the power supply voltage pin and the test pin.
8 . The display panel according to claim 5 , wherein the two adjacent signal pins are respectively a power supply voltage pin and a panel crack detection signal pin; and
four non-signal pins are arranged between the power supply voltage pin and the panel crack detection signal pin.
9 . The display panel according to claim 5 , wherein the two adjacent signal pins are respectively a common voltage signal pin and a panel crack detection signal pin; and
four non-signal pins are arranged between the common voltage signal pin and the panel crack detection signal pin.
10 . The display panel according to claim 5 , wherein the two adjacent signal pins are one of the following groups of two pins:
a data signal pin and a gate high-level signal pin;
a test control switch signal pin and a gate low-level signal pin;
the gate low-level signal pin and an initialization voltage signal pin;
the initialization voltage signal pin and a light emission control clock signal pin;
a start signal pin and a switch selection signal pin;
the switch selection signal pin and a detection feedback signal pin;
a light emission control detection feedback signal pin and a gate detection feedback signal pin;
a gate clock signal pin and the gate low-level signal pin; and
the gate low-level signal pin and the gate high-level signal pin;
wherein at least one non-signal pin is arranged between every two adjacent signal pins.
11 . The display panel according to claim 1 , wherein the signal pins comprise at least one group of the following signal pins:
two adjacent signal pins of the same type;
a panel crack detection signal pin, a conductive particle compression detection signal pin and a data signal pin which are adjacent;
a gate high-level signal pin and a test control switch signal pin which are adjacent;
a light emission control clock signal pin, a light emission control second clock signal pin and a light emission control start signal pin which are adjacent; and
a gate start signal pin, a gate second clock signal pin and a gate clock signal pin which are adjacent.
12 . The display panel according to claim 1 , wherein a space between any two adjacent pins among both the signal pins and the at least one non-signal pin is within a predetermined distance range.
13 . A display device, comprising: the display panel according to claim 1 .
14 . A circuit board, comprising:
a plurality of signal pins arranged at intervals in a first direction and used to be connected to a display panel; and
at least one non-signal pin disposed between two adjacent signal pins,
wherein the signal pins comprise:
a power supply voltage pin and a common voltage signal pin; wherein in the first direction, pin widths of the power supply voltage pin and the common voltage signal pin are larger than widths of the other signal pins,
wherein the number of the non-signal pins arranged between the two adjacent signal pins is one of:
positively correlated with a voltage of a signal pin having a higher voltage of the two signal pins; and
positively correlated with a difference between the voltages of the two signal pins,
wherein the two adjacent signal pins are respectively a power supply voltage pin and a test pin; and
three non-signal pins are arranged between the power supply voltage pin and the test pin.
15 . The circuit board according to claim 14 , wherein the two signal pins satisfy one of the following condition that:
a voltage of at least one of the two adjacent signal pins exceeds a first voltage threshold; and
a difference between voltages of the two adjacent signal pins exceeds a second voltage threshold.
16 . The circuit board according to claim 14 , wherein each of the signal pins comprises a first signal pin and a second signal pin; and
one non-signal pin is arranged between two adjacent first signal pins, and a plurality of non-signal pins is arranged between two adjacent second signal pins.
17 . The circuit board according to claim 14 , wherein the two adjacent signal pins are respectively a power supply voltage pin and a panel crack detection signal pin; and
four non-signal pins are arranged between the power supply voltage pin and the panel crack detection signal pin.