IP Library Granted Patent US 12,111,924
Granted Patent B2
US 12,111,924 · App. 17/789,439 · Granted Oct 8, 2024

System for detecting malicious programmable logic controller code

Inventors: Qinchen Gu (Atlanta, GA); Abdul Raheem Beyah (Atlanta, GA)
Assignee: Georgia Tech Research Corporation
G06F21/554G06F2221/034
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Quick Facts
Patent No.
US 12,111,924
App. No.
17/789,439
Granted
Oct 8, 2024
Kind
B2
Abstract

A system ( 100 ) and method for detecting a malicious programmable logic controller (PLC) code segment ( 110 ) in a PLC program corresponding to a specific type of PLC includes a binary parser ( 112 ) that parses the code segment ( 110 ) into a plurality of functional elements. A variable and function block mapper ( 114 ) maps the functional elements into a high-level data structure. A fuzzer ( 116 ) generates a behavioral model of the high-level data structure into an automaton ( 118 ). A classifier ( 120 ) predicts to which processes the automaton ( 118 ) corresponds. A detector ( 122 ) detects unsafe states in the automaton ( 118 ) and that generates an indication of a detected unsafe state.

Claims (33)

1. A system for detecting a malicious programmable logic controller (PLC) code segment in a PLC program corresponding to a specific type of PLC, the system comprising:

(a) a binary parser that parses the code segment into a plurality of functional elements;

(b) a variable and function block mapper that maps the functional elements into a high-level data structure;

(c) a fuzzer that generates a behavioral model of the high-level data structure into an automaton;

(d) a classifier that predicts to which processes the automaton corresponds; and

(e) a detector that detects unsafe states in the automaton and that generates an indication of a detected unsafe state, wherein the automaton includes a directed multigraph that includes a plurality of states in which each state is represented as a node and in which each state transition is represented as an edge, in which the classifier indicates a total number of states in the automaton and average degree of the multigraph, wherein the average degree equals a total number of edges in multigraph divided by a total number of nodes in the multigraph.

2. The system of claim 1 , wherein the fuzzer comprises an emulator that is programmed to emulate execution of the high-level data structure that is used to program the specific type of PLC by applying test case data to the high-level data structure and by detecting state transitions in the specific type of PLC.

3. The system of claim 2 , wherein at least one rule is applied in the emulator to a physical process controlled by the PLC and wherein the detector indicates an unsafe state in the code segment when the emulator indicates that the automaton goes into a predetermined state in which the rule is violated.

4. The system of claim 2 , wherein the emulator comprises a digital computer with a tangible non-volatile memory that includes a program that runs a model of the specific type of PLC.

5. The system of claim 1 , wherein the fuzzer comprises an example of the specific type of PLC that has been programmed to run the high-level data structure and into which test case data is fed.

6. The system of claim 1 , wherein the detector also detects paths leading to the unsafe states.

7. The system of claim 1 , wherein the classifier predicts to which processes the automaton corresponds by comparing the average degree of the multigraph to average degrees of other known processes.

8. The system of claim 1 , wherein the detector compares the average degree of the multigraph to an average degree of known safe code and wherein the system indicates that the code segment is suspicious when the average degree of the multigraph is less that the average degree of known safe code.

9. A method, operable on a digital computer that includes a tangible non-volatile memory, for detecting a malicious programmable logic controller (PLC) code segment in a PLC program corresponding to a specific type of PLC, comprising the steps of

(a) parsing the code segment into a plurality of functional elements;

(b) mapping the functional elements into a high-level data structure;

(c) generating, with a fuzzer, a behavioral model of the high-level data structure into an automaton;

(d) classifying the behavioral model so as to predict to which processes the automaton corresponds;

(e) detecting unsafe states in the automaton and generating an indication of a detected unsafe state;

(f) generating a multigraph so as to include a plurality of nodes and edges by representing each state as a node and by representing each state transition as an edge;

(g) determining a total number of states in the automaton; and

(h) determining an average degree of the multigraph, wherein the average degree equals a total number of edges in multigraph divided by a total number of nodes in the multigraph.

10. The method of claim 9 , wherein the fuzzer comprises an emulator and further comprising the step of emulating with the emulator execution of the high-level data structure that is used to program the specific type of PLC by applying test case data to the high-level data structure and by detecting state transitions in the specific type of PLC.

11. The method of claim 10 , further comprising the steps of:

(a) applying at least one rule in the emulator to a physical process controlled by the PLC; and

(b) indicating an unsafe state in the code segment when the emulator indicates that the automaton goes into a predetermined state in which the rule is violated.

12. The method of claim 10 , wherein the emulator comprises a program run on the digital computer and further comprising the step of running a model of the specific type of PLC as part of the emulator.

13. The method of claim 9 , wherein the fuzzer comprises an example of the specific type of PLC that has been programmed to run the high-level data structure and further comprising the step of feeding test case data into the example of the specific type of PLC.

14. The method of claim 9 , further comprising the step of determining at least one path leading to the unsafe states.

15. The method of claim 9 , further comprising the step of predicting to which processes the automaton corresponds by comparing the average degree of the multigraph to average degrees of other known processes.

16. The method of claim 9 , further comprising the steps of:

(a) comparing the average degree of the multigraph to an average degree of known safe code; and

(b) indicating that the code segment is suspicious when the average degree of the multigraph is less that the average degree of known safe code.

Assignments (2)
CONFIRMATORY LICENSE Recorded May 17, 2023
From: GEORGIA INSTITUTE OF TECHNOLOGY
To: UNITED STATES DEPARTMENT OF ENERGY
Reel/Frame 063666/0538 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2022
From: GU, QINCHEN; BEYAH, ABDUL RAHEEM
To: GEORGIA TECH RESEARCH CORPORATION
Reel/Frame 061470/0958 →
Continuity (2)
Provisional Application 62962002 · Jan 16, 2020
Related Publication 20230050691A1 · Feb 16, 2023