IP Library Granted Patent US 11,881,817
Granted Patent B2
US 11,881,817 · App. 17/806,308 · Granted Jan 23, 2024

Low power oscillator with variable duty cycle and method therefor

Inventors: Sinisa Milicevic (Waterloo, CA); Alexander Heubi (La Chaux-de-Fonds, CH); Noureddine Senouci (Le Landeron, CH)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H03B5/364H03K5/01H03B2200/0082
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Quick Facts
Patent No.
US 11,881,817
App. No.
17/806,308
Granted
Jan 23, 2024
Kind
B2
Abstract

An oscillator includes first and second capacitors, an inverter, a voltage shifting circuit, and a hysteresis buffer. The first and second capacitors have first terminals adapted to be coupled to respective first and second nodes, and second terminals coupled to ground. The inverter has an input coupled to the first node, and an output coupled to the second node. The voltage shifting circuit is coupled to the first and second nodes and has an input for receiving a tuning signal. The voltage shifting circuit changes an average voltage at the first node according to the tuning signal when an oscillation occurs in response to a crystal being coupled between the first and second nodes. The hysteresis buffer has an input coupled to one of first node and the second node, and an output for providing a clock signal having a duty cycle responsive to the tuning signal.

Claims (48)

1. An oscillator, comprising:

a first capacitor having a first terminal adapted to be coupled to a first node, and a second terminal coupled to ground;

a second capacitor having a first terminal adapted to be coupled to a second node, and a second terminal coupled to ground;

an inverter having an input coupled to said first node, and an output coupled to said second node;

a voltage shifting circuit coupled to said first node and to said second node and having an input for receiving a tuning signal, wherein said voltage shifting circuit changes an average voltage at said first node according to said tuning signal as a function of a value of a tunable capacitor when an oscillation occurs in response to a crystal being coupled between said first node and said second node; and

a hysteresis buffer, having an input coupled to one of said first node and said second node, and an output for providing a clock signal having a duty cycle responsive to said tuning signal.

2. The oscillator of claim 1 , wherein said voltage shifting circuit is characterized as being resistor-less.

3. The oscillator of claim 1 , wherein said voltage shifting circuit comprises:

a current source having an output terminal for providing a bias current to a third node;

said tunable capacitor having a first terminal coupled to said third node, and a second terminal coupled to ground;

a first transistor having a first current electrode coupled to said third node, a control electrode coupled to said third node, and a second current electrode coupled to said input of said hysteresis buffer; and

a second transistor having a first current electrode coupled to said input of said hysteresis buffer, a control electrode coupled to said third node, and a second current electrode coupled to said second node.

4. The oscillator of claim 3 , wherein each of said first transistor and said second transistor is an N-channel metal-oxide-semiconductor (MOS) transistor.

5. The oscillator of claim 1 , wherein said hysteresis buffer is a Schmitt trigger.

6. The oscillator of claim 1 , wherein each of said first terminal and said second terminal are terminals of an integrated circuit.

7. The oscillator of claim 6 , wherein said first capacitor and said second capacitor are formed on said integrated circuit, and said crystal is external to said integrated circuit.

8. The oscillator of claim 7 , wherein said voltage shifting circuit and said hysteresis buffer are formed on said integrated circuit.

9. An oscillator driver circuit having a first node and a second node for providing an oscillator output signal, comprising:

a first capacitor having a first terminal adapted to be coupled to the first node, and a second terminal coupled to ground;

a second capacitor having a first terminal adapted to be coupled to the second node, and a second terminal coupled to ground;

an inverter having an input coupled to the first node, and an output coupled to the second node; and

a voltage shifting circuit coupled to the first node and to the second node and having an input for receiving a tuning signal, wherein said voltage shifting circuit changes an average voltage at the first node according to said tuning signal as a function of a value of a tunable capacitor when an oscillation occurs in response to a crystal being coupled between said first node and said second node.

10. The oscillator driver circuit of claim 9 , wherein:

said voltage shifting circuit further has an input for receiving a tuning signal, wherein said voltage shifting circuit changes said average voltage at the first node during said oscillation according to said tuning signal.

11. The oscillator driver circuit of claim 10 , further comprising:

a hysteresis buffer, having an input coupled to one of said first node and said second node, and an output for providing a clock signal having a duty cycle that varies according to said tuning signal.

12. The oscillator driver circuit of claim 11 , wherein said hysteresis buffer is a Schmitt trigger.

13. The oscillator driver circuit of claim 11 , wherein the first terminal, the second terminal, said first capacitor, said second capacitor, said inverter, said voltage shifting circuit, and said hysteresis buffer are combined on an integrated circuit.

14. The oscillator driver circuit of claim 9 , wherein said voltage shifting circuit is characterized as being resistor-less.

15. The oscillator driver circuit of claim 14 , wherein said voltage shifting circuit comprises:

a current source having an output terminal for providing a bias current to a third node;

said tunable capacitor having a first terminal coupled to said third node, and a second terminal coupled to ground;

a first transistor having a first current electrode coupled to said third node, a control electrode coupled to said third node, and a second current electrode coupled to the first node; and

a second transistor having a first current electrode coupled to the first node, a control electrode coupled to said third node, and a second current electrode coupled to said second node.

16. The oscillator driver circuit of claim 15 , wherein each of said first transistor and said second transistor is an N-channel metal-oxide-semiconductor (MOS) transistor.

17. A method of establishing an oscillation using a crystal, comprising:

inverting a signal between a first node adapted to be coupled to a first terminal of the crystal and a second node adapted to be coupled to a second terminal of the crystal;

capacitively coupling said first node to ground;

capacitively coupling said second node to ground; and

changing an average voltage at the first node during an oscillation that occurs according to a tuning signal when the crystal is coupled between the first node and the second node, wherein said changing comprises changing a value of a tunable capacitor.

18. The method of claim 17 , wherein changing said average voltage comprises changing said average voltage without using a resistor.

19. The method of claim 17 , further comprising:

forming an output voltage in response to said average voltage at said first node using a hysteresis buffer.

20. The method of claim 17 , wherein changing said average voltage comprises:

providing a bias current to a third node;

coupling said tunable capacitor between said third node and a voltage reference node;

modulating a conductivity of a first transistor coupled between said third node and said first node with a voltage on said third node; and

modulating a conductivity of a second transistor coupled between said second node and said first node with said voltage on said third node.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENTS, RECORDED AT REEL 061071, FRAME 052 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC, AS GRANTOR; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC., AS GRANTOR
Reel/Frame 064067/0654 →
SECURITY INTEREST Recorded Aug 4, 2022
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 061071/0525 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2022
From: MILICEVIC, SINISA; HEUBI, ALEXANDER; SENOUCI, NOUREDDINE
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 060162/0118 →
Continuity (2)
Provisional Application 63260468 · Aug 20, 2021
Related Publication 20230056841A1 · Feb 23, 2023