Display device having conductive patterns with reduced display element overlap
A display device includes a substrate including a pixel region and a peripheral region. A plurality of pixels is disposed in the pixel region of the substrate. Each of the plurality of pixels includes a light emitting element. Data lines and scan lines are connected to each of the plurality of pixels. A power line is configured to supply power to the plurality of pixels. The power line includes a plurality of first conductive lines and a plurality of second conductive lines intersecting the plurality of first conductive lines. The plurality of second conductive lines is arranged in a region between adjacent light emitting elements of the plurality of pixels. At least some of the plurality of second conductive lines extend in a direction oblique to a direction of extension of the data lines or the scan lines.
1. A display device comprising:
pixels on a substrate, the pixels including at least a first transistor, a second transistor, a third transistor, and a fourth transistor, the first transistor including a gate electrode, a storage capacitor including a first electrode and a second electrode, and a light emitting element including an anode electrically connected to the first transistor;
a power line configured to supply power to the light emitting element; and
a connection line electrically connected to the first electrode,
wherein the second electrode forms an opening overlapped with the first electrode in a plan view, and
wherein the connection line electrically connects the gate electrode of the first transistor to a second transistor electrode of the third transistor and a second transistor electrode of the fourth transistor though a contact hole formed in the opening.
2. The display device of claim 1 , wherein the second electrode covers an edge of the first electrode in the plan view.
3. The display device of claim 1 , wherein the second transistor electrode of the third transistor and the second transistor electrode of the fourth transistor are disposed on a same layer, and
wherein the second transistor electrode of the third transistor and the second transistor electrode of the fourth transistor are disposed on a layer different from a layer on which the connection line is disposed.
4. The display device of claim 1 , wherein the gate electrode of the first transistor and the second electrode face each other without another conductive layer interposed therebetween.
5. The display device of claim 1 , wherein the first transistor includes a second transistor electrode, and the second transistor includes a second transistor electrode, and
wherein the second transistor electrode of the first transistor and the second transistor electrode of the second transistor are electrically connected to each other.
6. The display device of claim 1 , wherein the first transistor includes a first transistor electrode, and the third transistor includes a first transistor electrode, and
wherein the first transistor electrode of the first transistor and the first transistor electrode of the third transistor are electrically connected to each other.
7. The display device of claim 1 , wherein an edge of the first electrode is entirely covered by the second electrode in the plan view.
8. The display device of claim 1 , further comprising a data line,
wherein the power line includes a first power line and a second power line disposed on different layers, and
wherein the first power line, the data line, and the connection line are disposed on a same layer.
9. A display device comprising:
pixels on a substrate, the pixels including at least one transistor, a storage capacitor including a first electrode and a second electrode, and a light emitting element including an anode electrically connected to the at least one transistor,
a power line configured to supply power to the light emitting element;
a connection line electrically connected to the first electrode; and
an insulating layer on the second electrode,
wherein the second electrode forms an opening overlapped with the first electrode in a plan view,
wherein the power line includes a first conductive layer and a second conductive layer on different layers each other on the insulating layer, and
wherein the connection line is disposed on a same layer as the first conductive layer.
10. A display device comprising:
pixels on a substrate, the pixels including at least one transistor, a storage capacitor including a first electrode and a second electrode, and a light emitting element including an anode electrically connected to the at least one transistor;
a power line configured to supply power to the light emitting element;
a data line electrically connected to at least one of the pixels; and
a connection line electrically connected to the first electrode,
wherein the second electrode forms an opening overlapped with the first electrode in a plan view, and
wherein the connection line is disposed on a same layer as the data line.