IP Library Granted Patent US 12,737,656
Granted Patent B2
US 12,737,656 · App. 17/806,927 · Granted Sep 15, 2026

Doubly controlled iX circuit

Inventors: Mathias Soeken (Montreux, CH); Thomas Haener (Zug, CH); Vadym Kliuchnikov (Redmond, WA); Martin Henri Roetteler (Woodinville, WA)
Assignee: Microsoft Technology Licensing, LLC
G06N10/40G06F15/82
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,737,656
App. No.
17/806,927
Granted
Sep 15, 2026
Kind
B2
Abstract

A quantum computing device including a doubly controlled iX (CCiX) circuit. The CCiX circuit may be configured to, in a preparation stage, prepare a plurality of magic states. The CCiX circuit may be further configured to receive a plurality of input qubit states including a first control qubit state, a second control qubit state, and a target qubit state. In an execution stage, the CCiX circuit may be further configured to perform a CCiX operation on the target qubit state at least in part by performing a plurality of local joint measurements. At least a subset of the plurality of local joint measurements may be performed between the plurality of magic states and a plurality of auxiliary qubits. Performing the CCiX operation may further include performing a plurality of remote joint measurements of the input qubit states and a plurality of interface qubits included among the plurality of auxiliary qubits.

Claims (202)

1 . A quantum computing device comprising:

a doubly controlled iX (CCiX) circuit configured to:

in a preparation stage, prepare a plurality of magic states;

receive a plurality of input qubit states including a first control qubit state, a second control qubit state, and a target qubit state; and

in an execution stage, perform a CCiX operation on the target qubit state at least in part by:

performing a plurality of local joint measurements, wherein at least a subset of the plurality of local joint measurements are performed between the plurality of magic states and a plurality of auxiliary qubits; and

performing a plurality of remote joint measurements of the input qubit states and a plurality of interface qubits included among the plurality of auxiliary qubits.

2 . The quantum computing device of claim 1 , wherein the plurality of magic states prepared in the preparation stage includes a plurality of |S x states and a plurality of |T states.

3 . The quantum computing device of claim 2 , wherein the preparation stage includes:

a first preparation sub-stage in which the CCiX circuit is configured to prepare a first |S x state, a second |S x state, a first |T state, and a second |T state in parallel; and

a second preparation sub-stage subsequent to the first preparation sub-stage in which the CCiX circuit is configured to prepare a third |S x , a fourth |S x state, a third |T state, and a fourth |T state in parallel.

4 . The quantum computing device of claim 1 , wherein performing the plurality of remote joint measurements includes, in each of a first execution sub-stage and a second execution sub-stage, performing two remote ZZ measurements and a remote XZ measurement.

5 . The quantum computing device of claim 1 , wherein, in the execution stage, the CCiX circuit is configured to apply a plurality of exponential gates in parallel to the plurality of input qubit states when performing the CCiX operation.

6 . The quantum computing device of claim 5 , wherein the CCiX circuit is further configured to:

in the preparation stage, prepare a plurality of |GHZ n Z states and a plurality of |GHZ n X states; and

in the execution stage, apply the plurality of exponential gates at least in part by performing a plurality of local joint measurements on the plurality of |GHZ n Z states and the plurality of |GHZ n X states.

7 . The quantum computing device of claim 6 , wherein the CCiX circuit is configured to prepare the plurality of |GHZ n Z states and the plurality of |GHZ n X states at least in part by performing a plurality of quantum fanout operations.

8 . The quantum computing device of claim 7 , wherein the CCiX circuit is configured to prepare the plurality of |GHZ n Z states and the plurality of |GHZ n X states such that one or more of the |GHZ n Z states and one or more of the |GHZ n X states are formed along respective paths that have respective holes.

9 . The quantum computing device of claim 6 , wherein the execution stage includes:

a first execution sub-stage in which the CCiX circuit is configured to perform a plurality of local joint ZZ measurements of respective first subsets of the magic states and the auxiliary qubits; and

a second execution sub-stage in which the CCiX circuit is configured to perform a plurality of local joint XZ measurements of respective second subsets of the magic states and the auxiliary qubits.

10 . The quantum computing device of claim 5 , wherein the plurality of exponential gates includes an

e

i

π

8

(

I

I

Z

)

gate

,

an

e

-

i

π

8

(

I

Z

Z

)

gate

,

an

e

-

i

π

8

(

Z

I

Z

)

gate

,

and

an

e

i

π

8

(

Z

Z

Z

)

gate

.

11 . The quantum computing device of claim 1 , wherein the CCiX circuit is further configured to perform a plurality of X corrections and a plurality of Z corrections subsequently to the execution stage.

12 . The quantum computing device of claim 1 , wherein the CCiX circuit is included in a rectangular grid of logical qubits.

13 . A method for use with a quantum computing device that includes a doubtly controlled iX (CCiX) circuit and a measuremnet device, the method comprising:

at the (CCiX) circuit:

in a preparation stage, preparing a plurality of magic states;

receiving a plurality of input qubit states including a first control qubit state, a second control qubit state, and a target qubit state; and

in an execution stage, performing a CCiX operation on the target qubit state at least in part by:

with the measurement device, performing a plurality of local joint measurements, wherein at least a subset of the plurality of local joint measurements are performed between the plurality of magic states and a plurality of auxiliary qubits; and

with the measurement device, performing a plurality of remote joint measurements of the input qubit states and a plurality of interface qubits included among the plurality of auxiliary qubits.

14 . The method of claim 13 , wherein:

the plurality of magic states prepared in the preparation stage includes a plurality of |S x states and a plurality of |T states; and

the preparation stage includes:

in a first preparation sub-stage, preparing a first |S x state, a second |S x state, a first |T state, and a second |T state in parallel; and

in a second preparation sub-stage subsequent to the first preparation sub-stage, preparing a third |S x , a fourth |S x state, a third |T state, and a fourth |T state in parallel.

15 . The method of claim 13 , wherein performing the plurality of remote joint measurements includes, in each of a first execution sub-stage and a second execution sub-stage, performing two remote ZZ measurements and a remote XZ measurement.

16 . The method of claim 13 , further comprising, in the execution stage, applying a plurality of exponential gates in parallel to the plurality of input qubit states when performing the CCiX operation, wherein the plurality of exponential gates includes an

e

i

π

8

(

I

I

Z

)

gate

,

an

e

-

i

π

8

(

I

Z

Z

)

gate

,

an

e

-

i

π

8

(

Z

I

Z

)

gate

,

and

an

e

i

π

8

(

Z

Z

Z

)

gate

.

17 . The method of claim 16 , further comprising:

in the preparation stage, preparing a plurality of |GHZ n Z states and a plurality of |GHZ n X states at least in part by performing a plurality of quantum fanout operations; and

in the execution stage, applying the plurality of exponential gates at least in part by performing a plurality of local joint measurements on the plurality of |GHZ n Z states and the plurality of |GHZ n X states.

18 . The method of claim 17 , wherein the execution stage includes:

in a first execution sub-stage, performing a plurality of local joint ZZ measurements of respective first subsets of the magic states and the auxiliary qubits; and

in a second execution sub-stage, performing a plurality of local joint XZ measurements of respective second subsets of the magic states and the auxiliary qubits.

19 . The method of claim 13 , further comprising performing a plurality of X corrections and a plurality of Z corrections subsequently to the execution stage.

20 . A quantum computing device comprising:

a doubly controlled iX (CCiX) circuit configured to:

in a preparation stage, prepare a plurality of |S x states and a plurality of |T states at least in part by:

in a first preparation sub-stage, preparing a first |S x state, a second |S x state, a first |T state, and a second |T state in parallel; and

in a second preparation sub-stage subsequent to the first preparation sub-stage, preparing a third |S x , a fourth |S x state, a third |T state, and a fourth |T state in parallel; and

in an execution stage, perform a CCiX operation on the target qubit state at least in part by:

in a first execution sub-stage, performing a plurality of local joint ZZ measurements of respective first subsets of the |S x states, the |T states, and the auxiliary qubits;

in a second execution sub-stage, performing a plurality of local joint XZ measurements of respective second subsets of the |S x states, the |T states, and the auxiliary qubits; and

during each of the first execution sub-stage and the second execution sub-stage, performing a plurality of remote joint measurements of the input qubit states and a plurality of interface qubits included among the plurality of auxiliary qubits.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2023
From: SOEKEN, MATHIAS; HAENER, THOMAS; KLIUCHNIKOV, VADYM; ROETTELER, MARTIN HENRI
To: MICROSOFT TECHNOLOGY LICENSING, LLC
Reel/Frame 062443/0204 →
Continuity (1)
Related Publication 20230401474A1 · Dec 14, 2023
References Cited (36)
US 11119773B1 · Soeken · 2021 [cited by examiner]
US 11586969B2 · Gidney · 2023 [cited by examiner]
US 11863668B2 · McCarty · 2024 [cited by examiner]
US 20160328253A1 · Majumdar · 2016 [cited by applicant]
US 20170194930A1 · Wiebe et al. · 2017 [cited by applicant]
US 20200311592A1 · Gidney · 2020 [cited by applicant]
US 20200311593A1 · Gidney · 2020 [cited by applicant]
US 20200311594A1 · Gidney · 2020 [cited by applicant]
US 20200401478A1 · Reilly · 2020 [cited by applicant]
US 20210374586A1 · Kliuchnikov et al. · 2021 [cited by applicant]
US 20230143652A1 · Mckiernan · 2023 [cited by applicant]
US 20230401470A1 · Soeken · 2023 [cited by applicant]
CA 3135494A1 · 2020 [cited by applicant]
“International Search Report and Written Opinion Issued in PCT Application No. PCT/US2023/012066”, Mailed Date: Apr. 19, 2023, 15 Pages. [cited by applicant]
Srikanth, R., “Entanglement, Intractability and No. Signaling”, In Journal of Physica Scripta, vol. 81, Issue 6, May 11, 2010, pp. 1-15. [cited by applicant]
Ceschini, et al., “Design of an LSTM Cell on a Quantum Hardware”, In Journal of IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 69, Issue 3, Mar. 2022, pp. 1822-1826. [cited by applicant]
“International Search Report and Written Opinion Issued in PCT Application No. PCT/US2023/012065”, Mailed Date: May 15, 2023, 15 Pages. [cited by applicant]
Babbush, et al., “Encoding Electronic Spectra in Quantum Circuits with Linear T Complexity”, In Journal of Physical Review X, vol. 8, Issue 4, Oct. 23, 2018, 36 Pages. [cited by applicant]
Bombin, et al., “Logical Blocks for Fault-Tolerant Topological Quantum Computation”, In Repository of arXiv:2112.12160v1, Dec. 22, 2021, 34 Pages. [cited by applicant]
Bravyi, et al., “Universal Quantum Computation with Ideal Clifford Gates and Noisy Ancillas”, In Journal of Physical Review A, vol. 71, Issue 2, Feb. 22, 2005, 14 Pages. [cited by applicant]
Burg, et al., “Quantum Computing Enhanced Computational Catalysis”, In Journal of Physical Review Research, vol. 3, Issue 3, Jul. 16, 2021, 16 Pages. [cited by applicant]
Crooks, Gavin E., “Gates, States, and Circuits”, Retrieved from: https://threeplusone.com/pubs/on_gates.pdf, Jan. 12, 2022, 79 Pages. [cited by applicant]
Fowler, et al., “Low Overhead Quantum Computation using Lattice Surgery”, In Repository of arXiv:1808.06709v4, Aug. 30, 2019, 15 Pages. [cited by applicant]
Gidney, et al., “Flexible Layout of Surface Code Computations using AutoCCZ States”, In Repository of arXiv:1905.08916v1, May 22, 2019, 17 Pages. [cited by applicant]
Gidney, et al., “How to Factor 2048 Bit RSA Integers in 8 Hours using 20 Million Noisy Qubits”, In Repository of arXiv:1905.09749v1, May 23, 2019, 25 Pages. [cited by applicant]
Haner, et al., “Improved Quantum Circuits for Elliptic Curve Discrete Logarithms”, In Proceedings of International Conference on Post-Quantum Cryptography, Apr. 15, 2020, pp. 425-444. [cited by applicant]
Lee, et al., “Even More Efficient Quantum Computations of Chemistry Through Tensor Hypercontraction”, In Journal of PRX Quantum, vol. 2, Issue 3, Jul. 8, 2021, 62 Pages. [cited by applicant]
Litinski, et al., “Quantum Computing with Majorana Fermion Codes”, In Journal of Physical Review B, vol. 97, Issue 20, May 2, 2018, 27 Pages. [cited by applicant]
Low, et al., “Trading T-Gates for Dirty Qubits in State Preparation and Unitary Synthesis”, In Repository of arXiv:1812.00954v1, Dec. 3, 2018, 11 Pages. [cited by applicant]
Nielsen, et al., “Quantum Computation and Quantum Information”, In Publication of Cambridge University Press, 2010, 704 Pages. [cited by applicant]
Rosenbaum, David J., “Optimal Quantum Circuits for Nearest-Neighbor Architectures”, In Repository of arXiv:1205.0036v3, May 8, 2013, 24 Pages. [cited by applicant]
Shor, Peter W., “Polynomial-Time Algorithms for Prime Factorization and Discrete Logarithms on a Quantum Computer”, In SIAM Journal on Computing, vol. 26, Issue 5, Oct. 1997, pp. 1484-1509. [cited by applicant]
Final Office Action mailed on Dec. 1, 2025, in U.S. Appl. No. 17/806,923, 18 pages. [cited by applicant]
Communication pursuant to Article 94(3) EPC Received for European Application No. 23709797.7, mailed on Jan. 15, 2026, 08 pages. [cited by applicant]
Non-Final Office Action mailed on Jul. 24, 2025, in U.S. Appl. No. 17/806,923, 25 pages. [cited by applicant]
Notice of Allowance mailed on Apr. 24, 2026, in U.S. Appl. No. 17/806,923, 10 Pages. [cited by applicant]