ASSEMBLY OF FLEXIBLE AND INTEGRATED MODULE PACKAGES WITH LEADFRAMES

1 . A method for forming a packaged component, the packaged component having a first surface and an opposite second surface, the method comprising:

providing a first element, wherein the first element includes a first surface and an opposite second surface;

placing the second surface, of the first element, adjacent to the second surface of the packaged component;

providing a second element, wherein the second element includes a first surface and an opposite second surface;

placing the second surface, of the second element, adjacent to the second surface of the packaged component; and

electrically connecting, via a third element, a portion of the first element to a portion of the second element.

2 . The method of claim 1 comprising:

covering portions of the first element, the second element, and the third element with an encapsulation.

3 . The method of claim 1 comprising:

mounting a fourth element on the first surface of the second element; and

electrically connecting the fourth element to one or more portions of the first surface of the second element.

4 . The method of claim 3 , wherein electrically connecting the fourth element comprises connecting face-to-face the second element with the fourth element.

5 . The method of claim 3 , wherein the first element comprises a portion of a lead-frame, wherein the lead-frame is part of a lead-frame panel which includes a plurality of pockets, wherein most of a peripheral region of an individual pocket includes a plurality of leads that extend from the lead-frame panel towards the individual pocket.

6 . The method of claim 5 comprising:

applying an adhesive between a bottom surface of the lead-frame panel and a carrier.

7 . The method of claim 5 comprising:

connecting the second element to at least one lead of the plurality of leads via a bonding wire; and

encapsulating the bonding wire in a molding compound such that a top surface of the fourth element is free from the molding compound.

8 . The method of claim 1 , wherein the second element comprises a semiconductor base chip.

9 . The method of claim 1 , wherein the second element comprises a programmable interposer which includes an integrated circuit.

10 . The method of claim 1 , wherein the second surface of the first element and the second surface of the second element are substantially co-planar.

11 . A method comprising:

forming a lead-frame panel;

attaching the lead-frame panel to a carrier;

applying an adhesive to the carrier;

attaching a base die to the adhesive;

bonding a wire to a lead of the lead-frame panel and/or to pads of the base die;

building a package body with an open cavity such that the base die has an exposed surface;

encapsulating the lead of the base die with a molding compound;

attaching one or more integrated circuit components and/or passive devices to the base die; and

encapsulating the one or more integrated circuit components and/or passive devices, and areas around the open cavity to form a packaged module.

12 . The method of claim 11 comprising:

removing the carrier and the adhesive.

13 . The method of claim 12 comprising:

testing the packaged module.

14 . The method of claim 11 , wherein the base die includes a programmable interposer which includes an integrated circuit.

15 . The method of claim 11 , wherein the lead-frame panel which includes a plurality of pockets, wherein most of a peripheral region of an individual pocket includes a plurality of leads that extend from the lead-frame panel towards the individual pocket.

16 . A method for forming a packaged component, the packaged component having a first surface and an opposite second surface, the method comprising:

providing a first electrically-conductive element having a first surface and an opposite second surface;

providing a semiconductor element having the first surface and an opposite second surface; and

providing a second electrically-conductive element connecting the first electrically-conductive element to the semiconductor element, wherein the second surface of the first electrically-conductive element and the second surface of the semiconductor element are substantially co-planar.

17 . The method of claim 16 , wherein the semiconductor element is a first semiconductor element, wherein the method comprising:

mounting a second semiconductor element on the first surface of the first semiconductor element; and

electrically connecting the second semiconductor element to one or more portions of the first surface of the first semiconductor element.

18 . The method of claim 16 comprising:

covering portion of the first electrically-conductive element, the semiconductor element, and the second electrically-conductive element with an encapsulating element.

19 . The method of claim 16 , wherein the first electrically-conductive element comprises a portion of a lead-frame, wherein the lead-frame is part of a lead-frame panel which includes a plurality of pockets, wherein most of a peripheral region of an individual pocket includes a plurality of leads that extend from the lead-frame panel towards the individual pocket.

20 . The method of claim 16 , wherein a first distance from the second surface of the first electrically-conductive element to the first surface of the first electrically-conductive element is greater than or equal to a second distance from a plane through the second surface of the first electrically-conductive element to a plane through the second surface of the semiconductor element, wherein the first distance is measured in a direction normal to the first surface of the first electrically-conductive element to the second surface of the first electrically-conductive element.