Micro LED based display panel
Light emitting structures and methods of fabrication are described. In an embodiment, LED coupons are transferred to a carrier substrate and then patterned to LED mesa structures. Patterning may be performed on heterogeneous groups of LED coupons with a common mask set. The LED mesa structure are then transferred in bulk to a display substrate. In an embodiment, a light emitting structure includes an arrangement of LEDs with different thickness, and corresponding bottom contacts with different thicknesses bonded to a display substrate.
1. A light emitting structure comprising:
a substrate including a top bonding surface including a top surface dielectric bonding layer and an array of electrode pads;
an emission layer stack-up hybrid bonded to the top bonding surface of the substrate, the emission layer stack-up including:
an array of light emitting diodes (LEDs);
an array of reflective metal layers, wherein each reflective metal layer spans laterally around and underneath a corresponding LED, and each reflective metal layer is in electrical contact with a bottom surface of a corresponding LED;
a dielectric bonding layer spanning underneath the array of LEDs; and
an array of bond posts directly connected to the array of reflective metal layers and extending through the dielectric bonding layer;
wherein each bond post is metal-metal bonded with an electrode pad of the substrate, and the dielectric bonding layer is directly bonded with the top surface dielectric bonding layer of the substrate.
2. The light emitting structure of claim 1 , wherein the dielectric bonding layer is an oxide bonding layer.
3. The light emitting structure of claim 2 , wherein the top surface dielectric bonding layer is a top surface oxide bonding layer.
4. The light emitting structure of claim 1 , wherein each LED comprises an inorganic semiconductor-based p-n diode.
5. The light emitting structure of claim 4 , wherein each reflective metal layer comprises a material selected from the group consisting of aluminum, gold, and silver.
6. The light emitting structure of claim 4 , wherein each reflective metal layer is a continuous layer.
7. The light emitting structure of claim 6 , further comprising a plurality of sidewall passivation layers, each sidewall passivation layer between a corresponding LED and corresponding reflective metal layer.
8. The light emitting structure of claim 7 , further comprising an opening in each sidewall passivation layer that exposes a bottom surface of the corresponding LED, and the corresponding reflective metal layer contacts the bottom surface of the corresponding LED in the opening.
9. The light emitting structure of claim 7 , wherein each inorganic semiconductor-based p-n diode has a maximum width of less than 5 microns, and maximum height of less than 3 microns.
10. The light emitting structure of claim 4 , wherein each inorganic semiconductor-based p-n diode has a maximum width of less than 5 microns, and maximum height of less than 3 microns.
11. The light emitting structure of claim 10 , wherein the array of LEDs is arranged in a first group of LEDs and a second group of LEDs, wherein the array of bond posts includes a first group of bond posts electrically connected to the first group of LEDs and a second group of bond posts electrically connected to the second group of LEDs, wherein the first group of bond posts is thicker than the second group of bond posts.
12. The light emitting structure of claim 11 , wherein the first group of LEDs is thinner than the second group of LEDs.
13. The light emitting structure of claim 10 , further comprising an array of micro-optic elements over the array of LEDs.
14. The light emitting structure of claim 13 , wherein the array of micro-optic elements includes an array of half-balls.
15. The light emitting structure of claim 13 , wherein the array of micro-optic elements includes reflective sidewalls.
16. The light emitting structure of claim 1 , wherein the substrate includes circuitry to address the array of LEDs.
17. The light emitting structure of claim 1 , wherein the substrate includes complementary metal-oxide-semiconductor (CMOS) circuitry.