Hybrid buried power rail structure with dual front side and backside processing
A semiconductor device includes a semiconductor substrate having a top surface and a bottom surface. An electronic device is integrated into the top surface of the semiconductor substrate. A conductive power rail is positioned intermediate the top surface and the bottom surface of the semiconductor substrate. The conductive power rail is configured to conduct power to the electronic device.
1 . A semiconductor device, comprising:
a semiconductor substrate having a top surface and a bottom surface;
an electronic device integrated into the top surface of the semiconductor substrate; and
one or more conductive power rails positioned below the electronic device such that a footprint of the electronic device overlaps a footprint of the one or more conductive power rails.
2 . The semiconductor device of claim 1 , further comprising:
a through silicon via extends from the bottom surface through the semiconductor substrate and directly contacts a bottom surface of at least one of the one or more conductive power rails.
3 . The semiconductor device of claim 1 , further comprising:
a conductive jumper directly contacting a sidewall of at least one of the one or more conductive power rails.
4 . The semiconductor device of claim 3 , wherein the conductive jumper is positioned below the electronic device.
5 . The semiconductor device of claim 1 , wherein the one or more conductive power rails are buried inside the semiconductor substrate.
6 . A semiconductor device, comprising:
a semiconductor substrate having a top surface and a bottom surface;
an electronic device integrated into the top surface of the semiconductor substrate;
a first conductive power rail integrated into the top surface of the semiconductor substrate; and
a second conductive power rail positioned below the electronic device, and wherein a bottom surface of the first conductive power rail is below a top surface of the second conductive power rail.
7 . The semiconductor device of claim 6 , further comprising:
a through silicon via extending through the semiconductor substrate and directly contacting a bottom surface of the second conductive power rail.
8 . The semiconductor device of claim 6 , further comprising:
a through silicon via extending through the semiconductor substrate and directly contacting both a bottom surface of the first conductive power rail and a bottom surface of the second conductive power rail.
9 . The semiconductor device of claim 6 , further comprising:
a conductive jumper directly contacting both a sidewall of the first conductive power rail and a sidewall of the second conductive power rail.
10 . The semiconductor device of claim 9 , wherein the conductive jumper is positioned intermediate the electronic device and above the bottom surface.
11 . The semiconductor device of claim 6 , wherein the second conductive power rail is positioned intermediate the electronic device and above the bottom surface.
12 . The semiconductor device of claim 6 , wherein a height of the first conductive power rail is greater than a height of the second conductive power rail.
13 . The semiconductor device of claim 6 , further comprising:
a conductive jumper directly contacting both a sidewall of the first conductive power rail and a sidewall of the second conductive power rail.
14 . A semiconductor device comprising:
a semiconductor substrate having a top surface and a bottom surface;
an electronic device integrated into the top surface of the semiconductor substrate;
a first conductive power rail integrated into the top surface of the semiconductor substrate; and
a second conductive power rail positioned below the electronic device, and wherein a sidewall of the first conductive power rail directly contacts a sidewall of the second conductive power rail.
15 . The semiconductor device of claim 14 , further comprising:
a through silicon via extending through the semiconductor substrate and directly contacting a bottom surface of the second conductive power rail.
16 . The semiconductor device of claim 14 , further comprising:
a through silicon via extending through the semiconductor substrate and directly contacting both a bottom surface of the first conductive power rail and a bottom surface of the second conductive power rail.
17 . The semiconductor device of claim 14 , wherein the second conductive power rail is positioned intermediate the electronic device and above the bottom surface.
18 . The semiconductor device of claim 14 , wherein a height of the first conductive power rail is greater than a height of the second conductive power rail.